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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-10-09 21:02:18 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-10-09 21:10:19 +0800 |
| commit | 1543f3e331b317c086d9acfbdc2681e510c3d4c8 (patch) | |
| tree | c2d751d66dcf92652b1020c96da97cea54293d3e /gcc/tree-stdarg.cc | |
| parent | 3f99b709c87acf0c76234d6d054d2813b5e1a5fd (diff) | |
| download | gcc-1543f3e331b317c086d9acfbdc2681e510c3d4c8.zip gcc-1543f3e331b317c086d9acfbdc2681e510c3d4c8.tar.gz gcc-1543f3e331b317c086d9acfbdc2681e510c3d4c8.tar.bz2 | |
RISC-V Regression test: Fix FAIL of pr45752.c for RVV
RVV use load_lanes with stride = 5 vectorize this case with -fno-vect-cost-model
instead of SLP.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/pr45752.c: Adapt dump check for target supports load_lanes with stride = 5.
Diffstat (limited to 'gcc/tree-stdarg.cc')
0 files changed, 0 insertions, 0 deletions