[PATCH] phiopt: Handle bool in two_value_replacement [PR796232]
The following patch improves code generation on the included testcase by
enabling two_value_replacement on booleans. It does that only for arg0/arg1
values that conditional_replacement doesn't handle. Additionally
it limits two_value_replacement optimization to the late phiopt like
conditional_replacement.
2020-12-06 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/96232
* tree-ssa-phiopt.c (two_value_replacement): Optimize even boolean lhs
cases as long as arg0 has wider precision and conditional_replacement
doesn't handle that case.
(tree_ssa_phiopt_worker): Don't call two_value_replacement during
early phiopt.
* gcc.dg/tree-ssa/pr96232-2.c: New test.
* gcc.dg/tree-ssa/pr88676-2.c: Check phiopt2 dump rather than phiopt1.
1 files changed, 19 insertions, 4 deletions
@@ -337,7 +337,7 @@ tree_ssa_phiopt_worker (bool do_store_elim, bool do_hoist_loads, bool early_p) } /* Do the replacement of conditional if it can be done. */ - if (two_value_replacement (bb, bb1, e2, phi, arg0, arg1)) + if (!early_p && two_value_replacement (bb, bb1, e2, phi, arg0, arg1)) cfgchanged = true; else if (!early_p && conditional_replacement (bb, bb1, e1, e2, phi, @@ -635,7 +635,6 @@ two_value_replacement (basic_block cond_bb, basic_block middle_bb, if (TREE_CODE (lhs) != SSA_NAME || !INTEGRAL_TYPE_P (TREE_TYPE (lhs)) - || TREE_CODE (TREE_TYPE (lhs)) == BOOLEAN_TYPE || TREE_CODE (rhs) != INTEGER_CST) return false; @@ -648,9 +647,25 @@ two_value_replacement (basic_block cond_bb, basic_block middle_bb, return false; } + /* Defer boolean x ? 0 : {1,-1} or x ? {1,-1} : 0 to + conditional_replacement. */ + if (TREE_CODE (TREE_TYPE (lhs)) == BOOLEAN_TYPE + && (integer_zerop (arg0) + || integer_zerop (arg1) + || TREE_CODE (TREE_TYPE (arg0)) == BOOLEAN_TYPE + || (TYPE_PRECISION (TREE_TYPE (arg0)) + <= TYPE_PRECISION (TREE_TYPE (lhs))))) + return false; + wide_int min, max; - if (get_range_info (lhs, &min, &max) != VR_RANGE - || min + 1 != max + if (TREE_CODE (TREE_TYPE (lhs)) == BOOLEAN_TYPE) + { + min = wi::to_wide (boolean_false_node); + max = wi::to_wide (boolean_true_node); + } + else if (get_range_info (lhs, &min, &max) != VR_RANGE) + return false; + if (min + 1 != max || (wi::to_wide (rhs) != min && wi::to_wide (rhs) != max)) return false; |
, (void)) DEF_HELPER(void, helper_fnegq, (void))
-F_HELPER_SDQ_0_0(xto);
+DEF_HELPER(uint32_t, helper_fxtos, (void))
+F_HELPER_DQ_0_0(xto);
#endif
-F_HELPER_0_0(dtos);
-F_HELPER_0_0(stod);
+DEF_HELPER(float32, helper_fdtos, (void))
+DEF_HELPER(void, helper_fstod, (float32 src))
DEF_HELPER(float32, helper_fqtos, (void))
DEF_HELPER(void, helper_fstoq, (float32 src))
F_HELPER_0_0(qtod);
F_HELPER_0_0(dtoq);
DEF_HELPER(int32_t, helper_fstoi, (float32 src))
-F_HELPER_0_0(dtoi);
+DEF_HELPER(int32_t, helper_fdtoi, (void))
DEF_HELPER(int32_t, helper_fqtoi, (void))
#ifdef TARGET_SPARC64
-F_HELPER_0_0(stox);
+DEF_HELPER(void, helper_fstox, (uint32_t src))
F_HELPER_0_0(dtox);
F_HELPER_0_0(qtox);
F_HELPER_0_0(aligndata);
@@ -106,10 +106,10 @@ F_BINOP(mul);
F_BINOP(div);
#undef F_BINOP
-void helper_fsmuld(void)
+void helper_fsmuld(float32 src1, float32 src2)
{
- DT0 = float64_mul(float32_to_float64(FT0, &env->fp_status),
- float32_to_float64(FT1, &env->fp_status),
+ DT0 = float64_mul(float32_to_float64(src1, &env->fp_status),
+ float32_to_float64(src2, &env->fp_status),
&env->fp_status);
}
@@ -143,9 +143,9 @@ float32 helper_fitos(int32_t src)
return int32_to_float32(src, &env->fp_status);
}
-F_HELPER(ito, d)
+void helper_fitod(int32_t src)
{
- DT0 = int32_to_float64(*((int32_t *)&FT1), &env->fp_status);
+ DT0 = int32_to_float64(src, &env->fp_status);
}
void helper_fitoq(int32_t src)
@@ -154,9 +154,9 @@ void helper_fitoq(int32_t src)
}
#ifdef TARGET_SPARC64
-F_HELPER(xto, s)
+float32 helper_fxtos(void)
{
- FT0 = int64_to_float32(*((int64_t *)&DT1), &env->fp_status);
+ return int64_to_float32(*((int64_t *)&DT1), &env->fp_status);
}
F_HELPER(xto, d)
@@ -172,14 +172,14 @@ F_HELPER(xto, q)
#undef F_HELPER
/* floating point conversion */
-void helper_fdtos(void)
+float32 helper_fdtos(void)
{
- FT0 = float64_to_float32(DT1, &env->fp_status);
+ return float64_to_float32(DT1, &env->fp_status);
}
-void helper_fstod(void)
+void helper_fstod(float32 src)
{
- DT0 = float32_to_float64(FT1, &env->fp_status);
+ DT0 = float32_to_float64(src, &env->fp_status);
}
float32 helper_fqtos(void)
@@ -208,9 +208,9 @@ int32_t helper_fstoi(float32 src)
return float32_to_int32_round_to_zero(src, &env->fp_status);
}
-void helper_fdtoi(void)
+int32_t helper_fdtoi(void)
{
- *((int32_t *)&FT0) = float64_to_int32_round_to_zero(DT1, &env->fp_status);
+ return float64_to_int32_round_to_zero(DT1, &env->fp_status);
}
int32_t helper_fqtoi(void)
@@ -219,9 +219,9 @@ int32_t helper_fqtoi(void)
}
#ifdef TARGET_SPARC64
-void helper_fstox(void)
+void helper_fstox(float32 src)
{
- *((int64_t *)&DT0) = float32_to_int64_round_to_zero(FT1, &env->fp_status);
+ *((int64_t *)&DT0) = float32_to_int64_round_to_zero(src, &env->fp_status);
}
void helper_fdtox(void)
@@ -102,21 +102,6 @@ static int sign_extend(int x, int len)
#define IS_IMM (insn & (1<<13))
/* floating point registers moves */
-static void gen_op_load_fpr_FT0(unsigned int src)
-{
- tcg_gen_st_i32(cpu_fpr[src], cpu_env, offsetof(CPUSPARCState, ft0));
-}
-
-static void gen_op_load_fpr_FT1(unsigned int src)
-{
- tcg_gen_st_i32(cpu_fpr[src], cpu_env, offsetof(CPUSPARCState, ft1));
-}
-
-static void gen_op_store_FT0_fpr(unsigned int dst)
-{
- tcg_gen_ld_i32(cpu_fpr[dst], cpu_env, offsetof(CPUSPARCState, ft0));
-}
-
static void gen_op_load_fpr_DT0(unsigned int src)
{
tcg_gen_st_i32(cpu_fpr[src], cpu_env, offsetof(CPUSPARCState, dt0) +
@@ -2475,12 +2460,11 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
gen_op_store_QT0_fpr(QFPREG(rd));
break;
- case 0x69:
+ case 0x69: /* fsmuld */
CHECK_FPU_FEATURE(dc, FSMULD);
- gen_op_load_fpr_FT0(rs1);
- gen_op_load_fpr_FT1(rs2);
gen_clear_float_exceptions();
- tcg_gen_helper_0_0(helper_fsmuld);
+ tcg_gen_helper_0_2(helper_fsmuld, cpu_fpr[rs1],
+ cpu_fpr[rs2]);
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
gen_op_store_DT0_fpr(DFPREG(rd));
break;
@@ -2500,12 +2484,12 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
- case 0xc6:
+ case 0xc6: /* fdtos */
gen_op_load_fpr_DT1(DFPREG(rs2));
gen_clear_float_exceptions();
- tcg_gen_helper_0_0(helper_fdtos);
+ tcg_gen_helper_1_0(helper_fdtos, cpu_tmp32);
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
- gen_op_store_FT0_fpr(rd);
+ tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
case 0xc7: /* fqtos */
CHECK_FPU_FEATURE(dc, FLOAT128);
@@ -2515,14 +2499,12 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
- case 0xc8:
- gen_op_load_fpr_FT1(rs2);
- tcg_gen_helper_0_0(helper_fitod);
+ case 0xc8: /* fitod */
+ tcg_gen_helper_0_1(helper_fitod, cpu_fpr[rs2]);
gen_op_store_DT0_fpr(DFPREG(rd));
break;
- case 0xc9:
- gen_op_load_fpr_FT1(rs2);
- tcg_gen_helper_0_0(helper_fstod);
+ case 0xc9: /* fstod */
+ tcg_gen_helper_0_1(helper_fstod, cpu_fpr[rs2]);
gen_op_store_DT0_fpr(DFPREG(rd));
break;
case 0xcb: /* fqtod */
@@ -2556,12 +2538,12 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
- case 0xd2:
+ case 0xd2: /* fdtoi */
gen_op_load_fpr_DT1(DFPREG(rs2));
gen_clear_float_exceptions();
- tcg_gen_helper_0_0(helper_fdtoi);
+ tcg_gen_helper_1_0(helper_fdtoi, cpu_tmp32);
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
- gen_op_store_FT0_fpr(rd);
+ tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
case 0xd3: /* fqtoi */
CHECK_FPU_FEATURE(dc, FLOAT128);
@@ -2612,9 +2594,8 @@ static void disas_sparc_insn(DisasContext * dc)
gen_op_store_QT0_fpr(QFPREG(rd));
break;
case 0x81: /* V9 fstox */
- gen_op_load_fpr_FT1(rs2);
gen_clear_float_exceptions();
- tcg_gen_helper_0_0(helper_fstox);
+ tcg_gen_helper_0_1(helper_fstox, cpu_fpr[rs2]);
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
gen_op_store_DT0_fpr(DFPREG(rd));
break;
@@ -2636,9 +2617,9 @@ static void disas_sparc_insn(DisasContext * dc)
case 0x84: /* V9 fxtos */
gen_op_load_fpr_DT1(DFPREG(rs2));
gen_clear_float_exceptions();
- tcg_gen_helper_0_0(helper_fxtos);
+ tcg_gen_helper_1_0(helper_fxtos, cpu_tmp32);
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
- gen_op_store_FT0_fpr(rd);
+ tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
case 0x88: /* V9 fxtod */
gen_op_load_fpr_DT1(DFPREG(rs2));
