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authorOliver Kozul <Oliver.Kozul@rt-rk.com>2024-12-17 07:44:33 -0700
committerJeff Law <jlaw@ventanamicro.com>2024-12-17 07:44:33 -0700
commitd17b09c07a1da0e3950718aabc2cbdb90cae402b (patch)
tree5e943a12f18f19bb67ba9ef024d0ff420a4c5f96 /gcc/tree-inline.h
parentd24a5e2d381b290d4def659ed83e969b65d07f02 (diff)
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[PATCH] RISC-V: optimization on checking certain bits set ((x & mask) == val)
The patch optimizes code generation for comparisons of the form X & C1 == C2 by converting them to (X | ~C1) == (C2 | ~C1). C1 is a constant that requires li and addi to be loaded, while ~C1 requires a single lui instruction. As the values of C1 and C2 are not visible within the equality expression, a plus pattern is matched instead.       PR target/114087 gcc/ChangeLog: * config/riscv/riscv.md (*lui_constraint<ANYI:mode>_and_to_or): New pattern gcc/testsuite/ChangeLog: * gcc.target/riscv/pr114087-1.c: New test.
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