diff options
| author | Adam Nemet <anemet@caviumnetworks.com> | 2008-09-04 21:24:31 +0000 |
|---|---|---|
| committer | Adam Nemet <nemet@gcc.gnu.org> | 2008-09-04 21:24:31 +0000 |
| commit | c84241327480cec52608beaba811faf1f09e0b03 (patch) | |
| tree | dc0bd06f267d1ef48787f27859cb224f630704eb /gcc/toplev.c | |
| parent | 49912bcd97ec640f130fcf1551ea472d50f06f53 (diff) | |
| download | gcc-c84241327480cec52608beaba811faf1f09e0b03.zip gcc-c84241327480cec52608beaba811faf1f09e0b03.tar.gz gcc-c84241327480cec52608beaba811faf1f09e0b03.tar.bz2 | |
mips.h (ISA_HAS_EXTS): New macro.
* config/mips/mips.h (ISA_HAS_EXTS): New macro.
* config/mips/mips.md (*ashr_trunc<mode>): Name the pattern
combining an arithmetic right shift by more than 31 and a
trunction. Don't match for out-of-range shift amounts. Set
attribute mode to <MODE>.
(*lshr32_trunc<mode>): Name the pattern combining a logical right
shift by 32 and and a truncation. Set attribute mode to <MODE>.
(*<optab>_trunc<mode>_exts): New pattern for truncated right
shifts by less than 32.
(extv): Change predicate on first operand to accept registers.
Change predicate of the other operands from immediate_operand to
const_int_operand. Expand exts when source is a register.
(extzv): Change predicate of the constant operands from
immediate_operand to const_int_operand.
(extzv<mode>): Change predicate of the constant operands from
immediate_operand to const_int_operand and no constraint. Also
remove mode.
(*extzv_trunc<mode>_exts): New pattern.
testsuite/
* gcc.target/mips/truncate-2.c: New test.
* gcc.target/mips/octeon-exts-1.c: New test.
* gcc.target/mips/octeon-exts-2.c: New test.
* gcc.target/mips/octeon-exts-3.c: New test.
* gcc.target/mips/octeon-exts-4.c: New test.
From-SVN: r140009
Diffstat (limited to 'gcc/toplev.c')
0 files changed, 0 insertions, 0 deletions