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| author | Claudiu Zissulescu <claziss@gmail.com> | 2020-07-28 13:15:48 +0300 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@synopsys.com> | 2020-12-11 18:13:53 +0200 |
| commit | f7ad4446274831234e5acd3506fd2e01c7594c6a (patch) | |
| tree | 0c119c203adee9865e604e7b763e9bff5380f6a5 /gcc/testsuite | |
| parent | 078c7498908d9b74caff34d12099b5c85470e277 (diff) | |
| download | gcc-f7ad4446274831234e5acd3506fd2e01c7594c6a.zip gcc-f7ad4446274831234e5acd3506fd2e01c7594c6a.tar.gz gcc-f7ad4446274831234e5acd3506fd2e01c7594c6a.tar.bz2 | |
arc: Use separate predicated patterns for mpyd(u)
The compiler can match mpyd.eq r0,r1,r0 as a predicated instruction,
which is incorrect. The mpyd(u) instruction takes as input two 32-bit
registers, returning into a double 64-bit even-odd register pair. For
the predicated case, the ARC instruction decoder expects the
destination register to be the same as the first input register. In
the big-endian case the result is swaped in the destination register
pair, however, the instruction encoding remains the same. Refurbish
the mpyd(u) patterns to take into account the above observation.
gcc/
2020-12-11 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (mpyd<su_optab>_arcv2hs): New template
pattern.
(*pmpyd<su_optab>_arcv2hs): Likewise.
(*pmpyd<su_optab>_imm_arcv2hs): Likewise.
(mpyd_arcv2hs): Moved into above template.
(mpyd_imm_arcv2hs): Moved into above template.
(mpydu_arcv2hs): Likewise.
(mpydu_imm_arcv2hs): Likewise.
(su_optab): New optab prefix for sign/zero-extending operations.
gcc/testsuite/
2020-12-11 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/pmpyd.c: New test.
* gcc.target/arc/tmac-1.c: Update.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/gcc.target/arc/pmpyd.c | 15 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arc/tmac-1.c | 2 |
2 files changed, 16 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/arc/pmpyd.c b/gcc/testsuite/gcc.target/arc/pmpyd.c new file mode 100644 index 0000000..0eb0ff7 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/pmpyd.c @@ -0,0 +1,15 @@ +/* { dg-do assemble } */ +/* { dg-skip-if "" { ! { clmcpu } } } */ +/* { dg-options "-mcpu=hs38 -Os -EB" } */ + +/* This example is found during big-endian build. The compiler is + matching mpydu.hi r12,r13,r3 as a predicated instruction, which is + incorrect. The error is due to different predicates between the + output operand and the first operand of the instruction. */ +unsigned int test(unsigned int x, unsigned long long y) +{ + y /= 0x20000000; + if (x > 1) + y *= x; + return y; +} diff --git a/gcc/testsuite/gcc.target/arc/tmac-1.c b/gcc/testsuite/gcc.target/arc/tmac-1.c index 3fcabf5..5b302ca 100644 --- a/gcc/testsuite/gcc.target/arc/tmac-1.c +++ b/gcc/testsuite/gcc.target/arc/tmac-1.c @@ -7,5 +7,5 @@ /* { dg-final { scan-assembler "macd " } } */ /* { dg-final { scan-assembler "macdu" } } */ -/* { dg-final { scan-assembler "mpyd " } } */ +/* { dg-final { scan-assembler "mpyd\\t" } } */ /* { dg-final { scan-assembler "mpydu" } } */ |