diff options
author | Robin Dapp <rdapp@ventanamicro.com> | 2024-08-08 10:31:22 +0200 |
---|---|---|
committer | Robin Dapp <rdapp@ventanamicro.com> | 2024-11-18 11:48:42 +0100 |
commit | b89273a049a76ffc29dd43a536ad329f0d994c05 (patch) | |
tree | 55bc2c014d2c2fdf0f9ea55910b6c6f4093819fe /gcc/testsuite | |
parent | ebf30772415cfd3fa544fc7262b28b948591538f (diff) | |
download | gcc-b89273a049a76ffc29dd43a536ad329f0d994c05.zip gcc-b89273a049a76ffc29dd43a536ad329f0d994c05.tar.gz gcc-b89273a049a76ffc29dd43a536ad329f0d994c05.tar.bz2 |
RISC-V: Add else operand to masked loads [PR115336].
This patch adds else operands to masked loads. Currently the default
else operand predicate just accepts "undefined" (i.e. SCRATCH) values.
PR middle-end/115336
PR middle-end/116059
gcc/ChangeLog:
* config/riscv/autovec.md: Add else operand.
* config/riscv/predicates.md (maskload_else_operand): New
predicate.
* config/riscv/riscv-v.cc (get_else_operand): Remove static.
(expand_load_store): Use get_else_operand and adjust index.
(expand_gather_scatter): Ditto.
(expand_lanes_load_store): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr115336.c: New test.
* gcc.target/riscv/rvv/autovec/pr116059.c: New test.
Diffstat (limited to 'gcc/testsuite')
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115336.c | 20 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/autovec/pr116059.c | 15 |
2 files changed, 35 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115336.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115336.c new file mode 100644 index 0000000..aa2d023 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115336.c @@ -0,0 +1,20 @@ +/* { dg-do run } */ +/* { dg-options { -O3 -march=rv64gcv_zvl256b -mabi=lp64d } } */ +/* { dg-require-effective-target rvv_zvl256b_ok } */ + +short d[19]; +_Bool e[100][19][19]; +_Bool f[10000]; + +int main() +{ + for (long g = 0; g < 19; ++g) + d[g] = 3; + _Bool(*h)[19][19] = e; + for (short g = 0; g < 9; g++) + for (int i = 4; i < 16; i += 3) + f[i * 9 + g] = d[i] ? d[i] : h[g][i][2]; + for (long i = 120; i < 122; ++i) + if (f[i] != 1) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr116059.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr116059.c new file mode 100644 index 0000000..93700ac --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr116059.c @@ -0,0 +1,15 @@ +/* { dg-do run } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-add-options riscv_v } */ +/* { dg-additional-options "-O2 -std=gnu99" } */ + +char a; +_Bool b[11] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; +int main() { + _Bool *c = b; + for (signed d = 0; d < 11; d += 1) + a = d % 2 == 0 ? c[d] / c[d] + : c[d]; + if (a != 1) + __builtin_abort (); +} |