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author | Uros Bizjak <ubizjak@gmail.com> | 2021-12-24 17:09:36 +0100 |
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committer | Uros Bizjak <ubizjak@gmail.com> | 2021-12-24 17:09:36 +0100 |
commit | 8f921393e339090566c1589d81009caa954de90d (patch) | |
tree | 9e3d67b60b2217fa0ea52e0fc6d2ad9be49d1295 /gcc/testsuite | |
parent | 43dadcf3e7b0cba5a3ed3a8414b77e3fd75dfcd0 (diff) | |
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i386: Add V2SFmode DIV insn pattern [PR95046, PR103797]
Use V4SFmode "DIVPS X,Y" with [y0, y1, 1.0f, 1.0f] as a divisor
to avoid division by zero.
2021-12-24 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/95046
PR target/103797
* config/i386/mmx.md (divv2sf3): New instruction pattern.
gcc/testsuite/ChangeLog:
PR target/95046
PR target/103797
* gcc.target/i386/pr95046-1.c (test_div): Add.
(dg-options): Add -mno-recip.
Diffstat (limited to 'gcc/testsuite')
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr95046-1.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/i386/pr95046-1.c b/gcc/testsuite/gcc.target/i386/pr95046-1.c index bcc8bb5..2a0e6db 100644 --- a/gcc/testsuite/gcc.target/i386/pr95046-1.c +++ b/gcc/testsuite/gcc.target/i386/pr95046-1.c @@ -1,6 +1,6 @@ /* PR target/95046 */ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O3 -ffast-math -msse2" } */ +/* { dg-options "-O3 -ffast-math -msse2 -mno-recip" } */ float r[2], a[2], b[2]; @@ -33,6 +33,15 @@ test_mult (void) /* { dg-final { scan-assembler "\tv?mulps" } } */ void +test_div (void) +{ + for (int i = 0; i < 2; i++) + r[i] = a[i] / b[i]; +} + +/* { dg-final { scan-assembler "\tv?divps" } } */ + +void test_min (void) { for (int i = 0; i < 2; i++) |