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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2015-12-28 16:37:03 +0000 |
|---|---|---|
| committer | William Schmidt <wschmidt@gcc.gnu.org> | 2015-12-28 16:37:03 +0000 |
| commit | 5d57fdc1097999f0bdd3958c413b25560be196c4 (patch) | |
| tree | 7da6c3837fe4e7c831f895223b0ac2295ff1b741 /gcc/testsuite | |
| parent | a02d84b6f82e3be7241fb0643ca5f46476af2506 (diff) | |
| download | gcc-5d57fdc1097999f0bdd3958c413b25560be196c4.zip gcc-5d57fdc1097999f0bdd3958c413b25560be196c4.tar.gz gcc-5d57fdc1097999f0bdd3958c413b25560be196c4.tar.bz2 | |
rs6000.c (rs6000_emit_le_vsx_move): Verify that this is never called when lxvx/stxvx are available.
[gcc]
2015-12-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Verify that
this is never called when lxvx/stxvx are available.
(pass_analyze_swaps::gate): Don't perform swap optimization when
lxvx/stxvx are available.
* config/rs6000/vector.md (mov<mode>): Don't call
rs6000_emit_le_vsx_move when lxvx/stxvx are available.
* config/rs6000/vsx.md (*p9_vecload_<mode>): New define_insn.
(*p9_vecstore_<mode>): Likewise.
(*vsx_le_perm_load_<mode>:VSX_LE): Disable when lxvx/stxvx are
available.
(*vsx_le_perm_load_<mode>:VSX_W): Likewise.
(*vsx_le_perm_load_v8hi): Likewise.
(*vsx_le_perm_load_v16qi): Likewise.
(*vsx_le_perm_store_<mode>:VSX_LE): Likewise.
([related define_splits]): Likewise.
(*vsx_le_perm_store_<mode>:VSX_W): Likewise.
([related define_splits]): Likewise.
(*vsx_le_perm_store_v8hi): Likewise.
([related define_splits]): Likewise.
(*vsx_le_perm_store_v16qi): Likewise.
([related define_splits]): Likewise.
(*vsx_lxvd2x2_le_<mode>): Likewise.
(*vsx_lxvd2x4_le_<mode>): Likewise.
(*vsx_lxvd2x8_le_V8HI): Likewise.
(*vsx_lvxd2x16_le_V16QI): Likewise.
(*vsx_stxvd2x2_le_<mode>): Likewise.
(*vsx_stxvd2x4_le_<mode>): Likewise.
(*vsx_stxvd2x8_le_V8HI): Likewise.
(*vsx_stxvdx16_le_V16QI): Likewise.
([define_peepholes for vector load fusion]): Likewise.
[gcc/testsuite]
2015-12-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/p9-lxvx-stxvx-1.c: New.
* gcc.target/powerpc/p9-lxvx-stxvx-2.c: New.
From-SVN: r231974
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c | 26 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c | 15 |
3 files changed, 46 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1164bcd..949eeea 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-12-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.target/powerpc/p9-lxvx-stxvx-1.c: New. + * gcc.target/powerpc/p9-lxvx-stxvx-2.c: New. + 2015-12-24 Kirill Yukhin <kirill.yukhin@intel.com> * g++.dg/other/i386-2.C: Add -mpku. diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c new file mode 100644 index 0000000..df25d55 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c @@ -0,0 +1,26 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O3" } */ +/* { dg-final { scan-assembler "lxvx" } } */ +/* { dg-final { scan-assembler "stxvx" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +/* Verify P9 vector loads and stores are used rather than the + load-swap/swap-store workarounds for P8. */ +#define N 16 + +signed char ca[N] __attribute__((aligned(16))); +signed char cb[] __attribute__((aligned(16))) + = {8, 7, 6, 5, 4, 3, 2, 1, 0, -1, -2, -3, -4, -5, -6, -7}; +signed char cc[] __attribute__((aligned(16))) + = {1, 1, 2, 2, 3, 3, 2, 2, 1, 1, 0, 0, -1, -1, -2, -2}; + +__attribute__((noinline)) void foo () +{ + int i; + for (i = 0; i < N; i++) { + ca[i] = cb[i] - cc[i]; + } +} diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c new file mode 100644 index 0000000..853a456 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O1" } */ +/* { dg-final { scan-assembler "lxvx" } } */ +/* { dg-final { scan-assembler "stvewx" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ + +/* Verify we don't perform P8 load-vector fusion on P9. */ +#include <altivec.h> + +void f (void *p) +{ + vector unsigned int u32 = vec_vsx_ld (1, (const unsigned int *)p); + vec_ste (u32, 1, (unsigned int *)p); +} |