c-common.c (c_common_type_for_mode): Build vector types on demand.

gcc/ChangeLog
2004-03-16  Paolo Bonzini  <bonzini@gnu.org>

	* c-common.c (c_common_type_for_mode): Build vector types on
	demand.
	(handle_mode_attribute): Deprecate using the mode attribute
	to create vector types.  Fix indentation.
	(vector_type_node_list): Remove.
	(handle_vector_size_attribute): Create vector types on demand.
	Strip a NON_LVALUE_EXPR from the attribute if there is one.
	* c-typeck.c (comptypes): Make vector types compatible if they
	have the same underlying mode.
	(convert_for_assignment): Use comptypes to convert between
	vector types.
	* tree.c (build_common_tree_nodes_2): Do not create vector types.
	* config/arm/arm.c (arm_init_iwmmxt_builtins): Create necessary
	vector types.
	* tree.h: Remove vector types.
	* config/i386/i386.c (i386_init_mmx_sse_builtins): Likewise.
	* config/rs6000/rs6000.c (rs6000_init_builtins): Likewise.
	(V16QI_type_node, V2SI_type_node, V2SF_type_node, V4HI_type_node,
	V4SI_type_node, V4SF_type_node, V8HI_type_node): New globals.
	* doc/extend.texi (Vector Types): Document how to use the
	vector_size attribute to create vectors, rather than mode.

	* config/arm/mmintrin.h: Use vector_size attribute, not mode.
	* config/i386/emmintrin.h: Likewise.
	* config/i386/mmintrin.h: Likewise.
	* config/i386/xmmintrin.h: Likewise.
	* config/sh/ushmedia.h: Likwise.

testsuite/ChangeLog
2004-03-16  Paolo Bonzini  <bonzini@gnu.org>

	* g++.dg/eh/simd-1.C: Use vector_size attribute, not mode.
	* g++.dg/eh/simd-2.C: Likewise.
	* g++.dg/init/array10.C: Likewise.
	* gcc.c-torture/compile/simd-1.c: Likewise.
	* gcc.c-torture/compile/simd-2.c: Likewise.
	* gcc.c-torture/compile/simd-3.c: Likewise.
	* gcc.c-torture/compile/simd-4.c: Likewise.
	* gcc.c-torture/compile/simd-6.c: Likewise.
	* gcc.c-torture/execute/simd-1.c: Likewise.
	* gcc.c-torture/execute/simd-2.c: Likewise.
	* gcc.dg/compat/vector-defs.h: Likewise.
	* gcc.dg/20020531-1.c: Likewise.
	* gcc.dg/altivec-3.c: Likewise.
	* gcc.dg/altivec-4.c: Likewise.
	* gcc.dg/altivec-varargs-1.c: Likewise.
	* testsuite/gcc.dg/compat/vector-defs.h: Likewise.
	* gcc.dg/i386-mmx-3.c: Likewise.
	* gcc.dg/i386-sse-4.c: Likewise.
	* gcc.dg/i386-sse-5.c: Likewise.
	* gcc.dg/i386-sse-8.c: Likewise.
	* gcc.dg/simd-1.c: Likewise.
	* gcc.dg/20030218-1.c: Likewise.  Plus, do not declare
	__ev64_opaque__ since the machine description provides it.

Index: c-common.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/c-common.c,v
retrieving revision 1.487
diff -u -r1.487 c-common.c
--- c-common.c	26 Feb 2004 01:24:37 -0000	1.487
+++ c-common.c	10 Mar 2004 10:25:28 -0000
@@ -1874,38 +1874,12 @@
   if (mode == TYPE_MODE (build_pointer_type (integer_type_node)))
     return unsignedp ? make_unsigned_type (mode) : make_signed_type (mode);

-  switch (mode)
+  if (VECTOR_MODE_P (mode))
     {
-    case V16QImode:

From-SVN: r79544

22 files changed, 68 insertions, 44 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 847bf1d..62764c2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,29 @@
+2004-03-16  Paolo Bonzini  <bonzini@gnu.org>
+
+	* g++.dg/eh/simd-1.C: Use vector_size attribute, not mode.
+	* g++.dg/eh/simd-2.C: Likewise.
+	* g++.dg/init/array10.C: Likewise.
+	* gcc.c-torture/compile/simd-1.c: Likewise.
+	* gcc.c-torture/compile/simd-2.c: Likewise.
+	* gcc.c-torture/compile/simd-3.c: Likewise.
+	* gcc.c-torture/compile/simd-4.c: Likewise.
+	* gcc.c-torture/compile/simd-6.c: Likewise.
+	* gcc.c-torture/execute/simd-1.c: Likewise.
+	* gcc.c-torture/execute/simd-2.c: Likewise.
+	* gcc.dg/compat/vector-defs.h: Likewise.
+	* gcc.dg/20020531-1.c: Likewise.
+	* gcc.dg/altivec-3.c: Likewise.
+	* gcc.dg/altivec-4.c: Likewise.
+	* gcc.dg/altivec-varargs-1.c: Likewise.
+	* testsuite/gcc.dg/compat/vector-defs.h: Likewise.
+	* gcc.dg/i386-mmx-3.c: Likewise.
+	* gcc.dg/i386-sse-4.c: Likewise.
+	* gcc.dg/i386-sse-5.c: Likewise.
+	* gcc.dg/i386-sse-8.c: Likewise.
+	* gcc.dg/simd-1.c: Likewise.
+	* gcc.dg/20030218-1.c: Likewise.  Plus, do not declare
+	__ev64_opaque__ since the machine description provides it.
+
 2004-03-16  Eric Botcazou  <ebotcazou@libertysurf.fr>
 
 	* lib/compat.exp (skip_list): New global variable.
diff --git a/gcc/testsuite/g++.dg/eh/simd-1.C b/gcc/testsuite/g++.dg/eh/simd-1.C
index 667aafe..fe71b78 100644
--- a/gcc/testsuite/g++.dg/eh/simd-1.C
+++ b/gcc/testsuite/g++.dg/eh/simd-1.C
@@ -4,7 +4,7 @@
 // { dg-options "-O -w" { target i?86-*-* } }
 // { dg-do run }
 
-typedef int __attribute__((mode(V2SI))) vecint;
+typedef int __attribute__((vector_size (8))) vecint;
 
 vecint vecfunc (vecint beachbum)
 {
diff --git a/gcc/testsuite/g++.dg/eh/simd-2.C b/gcc/testsuite/g++.dg/eh/simd-2.C
index ee09323..5b37f3e 100644
--- a/gcc/testsuite/g++.dg/eh/simd-2.C
+++ b/gcc/testsuite/g++.dg/eh/simd-2.C
@@ -5,7 +5,7 @@
 // { dg-options "-O -w -maltivec" { target powerpc64-*-linux* } }
 // { dg-do run { xfail "powerpc64-*-linux*"}  }
 
-typedef int __attribute__((mode(V4SI))) vecint;
+typedef int __attribute__((vector_size (16))) vecint;
 
 vecint vecfunc (vecint beachbum)
 {
diff --git a/gcc/testsuite/g++.dg/init/array10.C b/gcc/testsuite/g++.dg/init/array10.C
index 3b059aa..4112105 100644
--- a/gcc/testsuite/g++.dg/init/array10.C
+++ b/gcc/testsuite/g++.dg/init/array10.C
@@ -1,6 +1,6 @@
 // { dg-do compile }
 // { dg-options "" }
 
-typedef int __attribute__((mode(V2SI))) vec;
+typedef int __attribute__((vector_size (8))) vec;
 
 vec foo[] = { (vec) {1, 2} };
diff --git a/gcc/testsuite/gcc.c-torture/compile/simd-1.c b/gcc/testsuite/gcc.c-torture/compile/simd-1.c
index c113bd4..6a07bbb 100644
--- a/gcc/testsuite/gcc.c-torture/compile/simd-1.c
+++ b/gcc/testsuite/gcc.c-torture/compile/simd-1.c
@@ -1,4 +1,4 @@
-typedef int v2si __attribute__ ((mode(V2SI)));
+typedef int v2si __attribute__ ((vector_size (8)));
 typedef unsigned di __attribute__ ((mode(DI)));
 void foo(unsigned long);
 void bar() {
diff --git a/gcc/testsuite/gcc.c-torture/compile/simd-2.c b/gcc/testsuite/gcc.c-torture/compile/simd-2.c
index 694e94f..480c712 100644
--- a/gcc/testsuite/gcc.c-torture/compile/simd-2.c
+++ b/gcc/testsuite/gcc.c-torture/compile/simd-2.c
@@ -1,4 +1,4 @@
-typedef float floatvect2 __attribute__((mode(V2SF)));
+typedef float floatvect2 __attribute__((vector_size (8)));
 
 typedef union
 {
diff --git a/gcc/testsuite/gcc.c-torture/compile/simd-3.c b/gcc/testsuite/gcc.c-torture/compile/simd-3.c
index f7dc54e..42a38ae 100644
--- a/gcc/testsuite/gcc.c-torture/compile/simd-3.c
+++ b/gcc/testsuite/gcc.c-torture/compile/simd-3.c
@@ -3,7 +3,7 @@
 /* If double is not wider than float, we probably don't have DFmode,
    or at least it's not as wide as double.  */
 #if DBL_MANT_DIG > FLT_MANT_DIG
-typedef float floatvect2 __attribute__((mode(V2DF)));
+typedef double floatvect2 __attribute__((vector_size (16)));
 
 typedef union
 {
diff --git a/gcc/testsuite/gcc.c-torture/compile/simd-4.c b/gcc/testsuite/gcc.c-torture/compile/simd-4.c
index 6ede943..6329fc0 100644
--- a/gcc/testsuite/gcc.c-torture/compile/simd-4.c
+++ b/gcc/testsuite/gcc.c-torture/compile/simd-4.c
@@ -1,4 +1,4 @@
-typedef float floatvect2 __attribute__((mode(V4SF)));
+typedef float floatvect2 __attribute__((vector_size (16)));
 
 typedef union
 {
diff --git a/gcc/testsuite/gcc.c-torture/compile/simd-6.c b/gcc/testsuite/gcc.c-torture/compile/simd-6.c
index 9106a73..7998e15 100644
--- a/gcc/testsuite/gcc.c-torture/compile/simd-6.c
+++ b/gcc/testsuite/gcc.c-torture/compile/simd-6.c
@@ -1,3 +1,3 @@
-typedef int __attribute__((mode(V2SI))) vec;
+typedef int __attribute__((vector_size (8))) vec;
 
 vec a[] = {(vec) {1, 2}, {3, 4}};
diff --git a/gcc/testsuite/gcc.c-torture/execute/simd-1.c b/gcc/testsuite/gcc.c-torture/execute/simd-1.c
index e103fd7..df9f1a9 100644
--- a/gcc/testsuite/gcc.c-torture/execute/simd-1.c
+++ b/gcc/testsuite/gcc.c-torture/execute/simd-1.c
@@ -4,7 +4,7 @@
    regardless of if the target has SIMD instructions.
 */
 
-typedef int __attribute__((mode(V4SI))) vecint;
+typedef int __attribute__((vector_size (16))) vecint;
 typedef int __attribute__((mode(SI))) siint;
 
 vecint i = { 150, 100, 150, 200 };
diff --git a/gcc/testsuite/gcc.c-torture/execute/simd-2.c b/gcc/testsuite/gcc.c-torture/execute/simd-2.c
index 2d1b922..d4f506a 100644
--- a/gcc/testsuite/gcc.c-torture/execute/simd-2.c
+++ b/gcc/testsuite/gcc.c-torture/execute/simd-2.c
@@ -3,7 +3,7 @@
    regardless of if the target has SIMD instructions.
 */
 
-typedef int __attribute__((mode(V8HI))) vecint;
+typedef short __attribute__((vector_size (16))) vecint;
 
 vecint i = { 150, 100, 150, 200, 0, 0, 0, 0 };
 vecint j = { 10, 13, 20, 30, 1, 1, 1, 1 };
diff --git a/gcc/testsuite/gcc.dg/20020531-1.c b/gcc/testsuite/gcc.dg/20020531-1.c
index c18033f..19f198f 100644
--- a/gcc/testsuite/gcc.dg/20020531-1.c
+++ b/gcc/testsuite/gcc.dg/20020531-1.c
@@ -4,7 +4,7 @@
 /* { dg-do compile { target i?86-*-* } } */
 /* { dg-options "-O2 -mmmx" } */
 
-typedef int __v8qi __attribute__ ((__mode__ (__V8QI__)));
+typedef unsigned char __v8qi __attribute__ ((vector_size (8)));
 extern void abort (void);
 extern void exit (int);
 
diff --git a/gcc/testsuite/gcc.dg/20030218-1.c b/gcc/testsuite/gcc.dg/20030218-1.c
index e41152c..6296d31 100644
--- a/gcc/testsuite/gcc.dg/20030218-1.c
+++ b/gcc/testsuite/gcc.dg/20030218-1.c
@@ -1,14 +1,12 @@
 /* { dg-do compile { target powerpc-*-eabi* } } */
-/* { dg-options "-mcpu=8540" } */
+/* { dg-options "-mspe=yes" } */
 
 /* Test vectors that can interconvert without a cast.  */
 
-typedef int __attribute__((mode(V2SI))) __ev64_opaque__;
-
 __ev64_opaque__ opp;
-int vint   __attribute__((mode(V2SI)));
-int vshort __attribute__((mode(V4HI)));
-int vfloat __attribute__((mode(V2SF)));
+int vint   __attribute__((vector_size (8)));
+short vshort __attribute__((vector_size (8)));
+float vfloat __attribute__((vector_size (8)));
 
 int
 main (void)
diff --git a/gcc/testsuite/gcc.dg/altivec-3.c b/gcc/testsuite/gcc.dg/altivec-3.c
index 1321a72..91fa8f2 100644
--- a/gcc/testsuite/gcc.dg/altivec-3.c
+++ b/gcc/testsuite/gcc.dg/altivec-3.c
@@ -3,8 +3,8 @@
 
 #include "altivec_check.h"
 
-typedef int int4 __attribute__ ((mode(V4SI)));
-typedef float float4 __attribute__ ((mode(V4SF)));
+typedef int int4 __attribute__ ((vector_size (16)));
+typedef float float4 __attribute__ ((vector_size (16)));
 
 int4 a1 = (int4) { 100, 200, 300, 400 };
 int4 a2 = (int4) { 500, 600, 700, 800 };
diff --git a/gcc/testsuite/gcc.dg/altivec-4.c b/gcc/testsuite/gcc.dg/altivec-4.c
index 1756635..78dc815 100644
--- a/gcc/testsuite/gcc.dg/altivec-4.c
+++ b/gcc/testsuite/gcc.dg/altivec-4.c
@@ -3,7 +3,7 @@
 
 #define vector __attribute__((vector_size(16)))
 
-static int __attribute__((mode(V4SI))) x, y;
+static int vector x, y;
 
 static vector signed int i,j;
 static vector signed short s,t;
diff --git a/gcc/testsuite/gcc.dg/altivec-varargs-1.c b/gcc/testsuite/gcc.dg/altivec-varargs-1.c
index 14e5e6e..fd2b74f 100644
--- a/gcc/testsuite/gcc.dg/altivec-varargs-1.c
+++ b/gcc/testsuite/gcc.dg/altivec-varargs-1.c
@@ -6,7 +6,7 @@
 
 #include "altivec_check.h"
 
-#define vector __attribute__((mode(V4SI)))
+#define vector __attribute__((vector_size (16)))
 
 const vector unsigned int v1 = {10,11,12,13};
 const vector unsigned int v2 = {20,21,22,23};
diff --git a/gcc/testsuite/gcc.dg/compat/vector-defs.h b/gcc/testsuite/gcc.dg/compat/vector-defs.h
index cef5d76..ecb3960 100644
--- a/gcc/testsuite/gcc.dg/compat/vector-defs.h
+++ b/gcc/testsuite/gcc.dg/compat/vector-defs.h
@@ -2,45 +2,45 @@
    c_common_type_for_mode, grouped by base mode.  */
 
 typedef int __attribute__((mode(QI))) qi;
-typedef int __attribute__((mode(V8QI))) v8qi;
-typedef int __attribute__((mode(V16QI))) v16qi;
+typedef qi __attribute__((vector_size (8))) v8qi;
+typedef qi __attribute__((vector_size (16))) v16qi;
 
 typedef union U8QI { v8qi v; qi a[8]; } u8qi;
 typedef union U16QI { v16qi v; qi a[16]; } u16qi;
 
 typedef int __attribute__((mode(HI))) hi;
-typedef int __attribute__((mode(V2HI))) v2hi;
-typedef int __attribute__((mode(V4HI))) v4hi;
-typedef int __attribute__((mode(V8HI))) v8hi;
+typedef hi __attribute__((vector_size (4))) v2hi;
+typedef hi __attribute__((vector_size (8))) v4hi;
+typedef hi __attribute__((vector_size (16))) v8hi;
 
 typedef union U2HI { v2hi v; hi a[2]; } u2hi;
 typedef union U4HI { v4hi v; hi a[4]; } u4hi;
 typedef union U8HI { v8hi v; hi a[8]; } u8hi;
 
 typedef int __attribute__((mode(SI))) si;
-typedef int __attribute__((mode(V2SI))) v2si;
-typedef int __attribute__((mode(V4SI))) v4si;
+typedef si __attribute__((vector_size (8))) v2si;
+typedef si __attribute__((vector_size (16))) v4si;
 
 typedef union U2SI { v2si v; si a[2]; } u2si;
 typedef union U4SI { v4si v; si a[4]; } u4si;
 
 typedef int __attribute__((mode(DI))) di;
-typedef int __attribute__((mode(V1DI))) v1di;
-typedef int __attribute__((mode(V2DI))) v2di;
+typedef di __attribute__((vector_size (8))) v1di;
+typedef di __attribute__((vector_size (16))) v2di;
 
 typedef union U1DI { v1di v; di a[1]; } u1di;
 typedef union U2DI { v2di v; di a[2]; } u2di;
 
 typedef float __attribute__((mode(SF))) sf;
-typedef float __attribute__((mode(V2SF))) v2sf;
-typedef float __attribute__((mode(V4SF))) v4sf;
-typedef float __attribute__((mode(V16SF))) v16sf;
+typedef sf __attribute__((vector_size (8))) v2sf;
+typedef sf __attribute__((vector_size (16))) v4sf;
+typedef sf __attribute__((vector_size (64))) v16sf;
 
 typedef union U2SF { v2sf v; sf a[2]; } u2sf;
 typedef union U4SF { v4sf v; sf a[4]; } u4sf;
 typedef union U16SF { v16sf v; sf a[16]; } u16sf;
 
 typedef float __attribute__((mode(DF))) df;
-typedef float __attribute__((mode(V2DF))) v2df;
+typedef df __attribute__((vector_size (16))) v2df;
 
 typedef union U2DF { v2df v; df a[2]; } u2df;
diff --git a/gcc/testsuite/gcc.dg/i386-mmx-3.c b/gcc/testsuite/gcc.dg/i386-mmx-3.c
index b417dda..d4d6109 100644
--- a/gcc/testsuite/gcc.dg/i386-mmx-3.c
+++ b/gcc/testsuite/gcc.dg/i386-mmx-3.c
@@ -3,7 +3,7 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-*} } */
 /* { dg-options "-O1 -mmmx -march=k8" } */
 
-typedef int v4hi __attribute__ ((mode (V4HI)));
+typedef short v4hi __attribute__ ((vector_size (8)));
 
 static inline v4hi cvtsi_v4hi (int i)
 {
diff --git a/gcc/testsuite/gcc.dg/i386-sse-4.c b/gcc/testsuite/gcc.dg/i386-sse-4.c
index c94e7f8..7f6d817 100644
--- a/gcc/testsuite/gcc.dg/i386-sse-4.c
+++ b/gcc/testsuite/gcc.dg/i386-sse-4.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-O0 -msse" } */
 
-typedef void __vr __attribute__ ((__mode__ (__V4SF__)));
+typedef float __vr __attribute__ ((vector_size (16)));
 
 struct vector
 {
diff --git a/gcc/testsuite/gcc.dg/i386-sse-5.c b/gcc/testsuite/gcc.dg/i386-sse-5.c
index edb4fb4..81184fc 100644
--- a/gcc/testsuite/gcc.dg/i386-sse-5.c
+++ b/gcc/testsuite/gcc.dg/i386-sse-5.c
@@ -1,6 +1,6 @@
 /* { dg-do compile { target i?86-*-* } } */
 /* { dg-options "-Winline -O2 -march=i386" } */
-typedef int v2df __attribute__ ((mode(V2DF)));
+typedef double v2df __attribute__ ((vector_size (16)));
 v2df p;
 q(v2df t)
 {			 /* { dg-warning "SSE" "" } */
diff --git a/gcc/testsuite/gcc.dg/i386-sse-8.c b/gcc/testsuite/gcc.dg/i386-sse-8.c
index d6e1056..c415de9 100644
--- a/gcc/testsuite/gcc.dg/i386-sse-8.c
+++ b/gcc/testsuite/gcc.dg/i386-sse-8.c
@@ -6,7 +6,7 @@
 
 int main() 
 { 
-  typedef int v __attribute__ ((mode(V2DI))); 
+  typedef long long int v __attribute__ ((vector_size (16))); 
   v a, b; 
   a = b; 
   return 0; 
diff --git a/gcc/testsuite/gcc.dg/simd-1.c b/gcc/testsuite/gcc.dg/simd-1.c
index fff6292..43e63e4 100644
--- a/gcc/testsuite/gcc.dg/simd-1.c
+++ b/gcc/testsuite/gcc.dg/simd-1.c
@@ -4,10 +4,10 @@
 /* Origin: Aldy Hernandez <aldyh@redhat.com>.  */
 /* Purpose: Program to test generic SIMD support.  */
 
-typedef int __attribute__((mode(V4SI))) v4si;
-typedef int __attribute__((mode(V8HI))) v8hi;
-typedef int __attribute__((mode(V2SI))) v2si;
-typedef unsigned int __attribute__((mode(V4SI))) uv4si;
+typedef int __attribute__((vector_size (16))) v4si;
+typedef short __attribute__((vector_size (16))) v8hi;
+typedef int __attribute__((vector_size (8))) v2si;
+typedef unsigned int __attribute__((vector_size (16))) uv4si;
 
 v4si a, b;
 v2si c, d;
@@ -16,7 +16,7 @@ uv4si f;
 
 int foo __attribute__((mode(DI)));
 int foo1 __attribute__((mode(SI)));
-int foo2 __attribute__((mode(V4HI)));
+short foo2 __attribute__((vector_size (8)));
 
 void
 hanneke ()
@@ -32,7 +32,7 @@ hanneke ()
   e = (typeof (e)) a;
 
   /* Different signed SIMD assignment.  */
-  f = a; /* { dg-error "incompatible types in assignment" } */
+  f = a;
 
   /* Casted different signed SIMD assignment.  */
   f = (uv4si) a;