constraints.md (Yv): New constraint.

	* config/i386/constraints.md (Yv): New constraint.
	* config/i386/i386.h (VALID_AVX512VL_128_REG_MODE): Allow
	TFmode and V1TImode in xmm16+ registers for TARGET_AVX512VL.
	* config/i386/i386.md (avx512fvecmode): New mode attr.
	(*pushtf): Use v constraint instead of x.
	(*movtf_internal): Likewise.  For TARGET_AVX512VL and
	xmm16+ registers, use vmovdqu64 or vmovdqa64 instructions.
	(*absneg<mode>2): Use Yv constraint instead of x constraint.
	(*absnegtf2_sse): Likewise.
	(copysign<mode>3_const, copysign<mode>3_var): Likewise.
	* config/i386/sse.md (*andnot<mode>3): Add avx512vl and
	avx512f alternatives.
	(*andnottf3, *<code><mode>3, *<code>tf3): Likewise.

	* gcc.target/i386/avx512dq-abs-copysign-1.c: New test.
	* gcc.target/i386/avx512vl-abs-copysign-1.c: New test.
	* gcc.target/i386/avx512vl-abs-copysign-2.c: New test.

From-SVN: r236161

4 files changed, 197 insertions, 0 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ce5dfea..fa2c123 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2016-05-12  Jakub Jelinek  <jakub@redhat.com>
+
+	* gcc.target/i386/avx512dq-abs-copysign-1.c: New test.
+	* gcc.target/i386/avx512vl-abs-copysign-1.c: New test.
+	* gcc.target/i386/avx512vl-abs-copysign-2.c: New test.
+
 2016-05-12  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/70986
diff --git a/gcc/testsuite/gcc.target/i386/avx512dq-abs-copysign-1.c b/gcc/testsuite/gcc.target/i386/avx512dq-abs-copysign-1.c
new file mode 100644
index 0000000..cb542d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512dq-abs-copysign-1.c
@@ -0,0 +1,71 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-Ofast -mavx512vl -mavx512dq" } */
+
+void
+f1 (float x)
+{
+  register float a __asm ("xmm16");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = __builtin_fabsf (a);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f2 (float x, float y)
+{
+  register float a __asm ("xmm16"), b __asm ("xmm17");
+  a = x;
+  b = y;
+  asm volatile ("" : "+v" (a), "+v" (b));
+  a = __builtin_copysignf (a, b);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f3 (float x)
+{
+  register float a __asm ("xmm16");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = -a;
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f4 (double x)
+{
+  register double a __asm ("xmm18");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = __builtin_fabs (a);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f5 (double x, double y)
+{
+  register double a __asm ("xmm18"), b __asm ("xmm19");
+  a = x;
+  b = y;
+  asm volatile ("" : "+v" (a), "+v" (b));
+  a = __builtin_copysign (a, b);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f6 (double x)
+{
+  register double a __asm ("xmm18");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = -a;
+  asm volatile ("" : "+v" (a));
+}
+
+/* { dg-final { scan-assembler "vandps\[^\n\r\]*xmm16" } } */
+/* { dg-final { scan-assembler "vorps\[^\n\r\]*xmm16" } } */
+/* { dg-final { scan-assembler "vxorps\[^\n\r\]*xmm16" } } */
+/* { dg-final { scan-assembler "vandpd\[^\n\r\]*xmm18" } } */
+/* { dg-final { scan-assembler "vorpd\[^\n\r\]*xmm18" } } */
+/* { dg-final { scan-assembler "vxorpd\[^\n\r\]*xmm18" } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-abs-copysign-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-abs-copysign-1.c
new file mode 100644
index 0000000..b375c5f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-abs-copysign-1.c
@@ -0,0 +1,71 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-Ofast -mavx512vl -mno-avx512dq" } */
+
+void
+f1 (float x)
+{
+  register float a __asm ("xmm16");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = __builtin_fabsf (a);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f2 (float x, float y)
+{
+  register float a __asm ("xmm16"), b __asm ("xmm17");
+  a = x;
+  b = y;
+  asm volatile ("" : "+v" (a), "+v" (b));
+  a = __builtin_copysignf (a, b);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f3 (float x)
+{
+  register float a __asm ("xmm16");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = -a;
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f4 (double x)
+{
+  register double a __asm ("xmm18");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = __builtin_fabs (a);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f5 (double x, double y)
+{
+  register double a __asm ("xmm18"), b __asm ("xmm19");
+  a = x;
+  b = y;
+  asm volatile ("" : "+v" (a), "+v" (b));
+  a = __builtin_copysign (a, b);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f6 (double x)
+{
+  register double a __asm ("xmm18");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = -a;
+  asm volatile ("" : "+v" (a));
+}
+
+/* { dg-final { scan-assembler "vpandd\[^\n\r\]*xmm16" } } */
+/* { dg-final { scan-assembler "vpord\[^\n\r\]*xmm16" } } */
+/* { dg-final { scan-assembler "vpxord\[^\n\r\]*xmm16" } } */
+/* { dg-final { scan-assembler "vpandq\[^\n\r\]*xmm18" } } */
+/* { dg-final { scan-assembler "vporq\[^\n\r\]*xmm18" } } */
+/* { dg-final { scan-assembler "vpxorq\[^\n\r\]*xmm18" } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-abs-copysign-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-abs-copysign-2.c
new file mode 100644
index 0000000..9082cdb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-abs-copysign-2.c
@@ -0,0 +1,49 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-Ofast -mavx512vl" } */
+
+void
+f1 (__float128 x)
+{
+  register __float128 a __asm ("xmm16");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = __builtin_fabsq (a);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f2 (__float128 x, __float128 y)
+{
+  register __float128 a __asm ("xmm16"), b __asm ("xmm17");
+  a = x;
+  b = y;
+  asm volatile ("" : "+v" (a), "+v" (b));
+  a = __builtin_copysignq (a, b);
+  asm volatile ("" : "+v" (a));
+}
+
+void
+f3 (__float128 x)
+{
+  register __float128 a __asm ("xmm16");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  a = -a;
+  asm volatile ("" : "+v" (a));
+}
+
+__int128_t
+f4 (void)
+{
+  register __int128_t a __asm ("xmm16");
+  register __int128_t __attribute__((vector_size (16))) b __asm ("xmm17");
+  a = 1;
+  asm volatile ("" : "+v" (a));
+  b[0] = a;
+  asm volatile ("" : "+v" (b));
+  return b[0];
+}
+
+/* { dg-final { scan-assembler "vpandq\[^\n\r\]*xmm16" } } */
+/* { dg-final { scan-assembler "vporq\[^\n\r\]*xmm16" } } */
+/* { dg-final { scan-assembler "vpxorq\[^\n\r\]*xmm16" } } */