arm: vst1q_types_x3 ACLE intrinsics

This patch is part of a series of patches implementing the _xN
variants of the vst1q intrinsic for the arm port. This patch adds the
_x3 variants of the vst1q intrinsic.

ACLE documents:
https://developer.arm.com/documentation/ihi0053/latest/

ISA documents:
https://developer.arm.com/documentation/ddi0487/latest/

gcc/ChangeLog:
	* config/arm/arm_neon.h
	(vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
	(vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
	(vst1q_f16_x3, vst1q_f32_x3): New.
	(vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
	(vst1q_bf16_x3): New.
	* config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
	* config/arm/neon.md (neon_vst1q_x3<mode>): New.

gcc/testsuite/ChangeLog:
	* gcc.target/arm/simd/vst1q_base_xN_1.c: Add new tests.
	* gcc.target/arm/simd/vst1q_bf16_xN_1.c: Add new tests.
	* gcc.target/arm/simd/vst1q_fp16_xN_1.c: Add new tests.
	* gcc.target/arm/simd/vst1q_p64_xN_1.c: Add new tests.

4 files changed, 78 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
index 4a17a80..838da09 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
@@ -60,10 +60,70 @@ void test_vst1q_p16_x2 (poly16_t * ptr, poly16x8x2_t val)
     vst1q_p16_x2 (ptr, val);
 }
 
+void test_vst1q_u8_x3 (uint8_t * ptr, uint8x16x3_t val)
+{
+    vst1q_u8_x3 (ptr, val);
+}
+
+void test_vst1q_u16_x3 (uint16_t * ptr, uint16x8x3_t val)
+{
+    vst1q_u16_x3 (ptr, val);
+}
+
+void test_vst1q_u32_x3 (uint32_t * ptr, uint32x4x3_t val)
+{
+    vst1q_u32_x3 (ptr, val);
+}
+
+void test_vst1q_u64_x3 (uint64_t * ptr, uint64x2x3_t val)
+{
+    vst1q_u64_x3 (ptr, val);
+}
+
+void test_vst1q_s8_x3 (int8_t * ptr, int8x16x3_t val)
+{
+    vst1q_s8_x3 (ptr, val);
+}
+
+void test_vst1q_s16_x3 (int16_t * ptr, int16x8x3_t val)
+{
+    vst1q_s16_x3 (ptr, val);
+}
+
+void test_vst1q_s32_x3 (int32_t * ptr, int32x4x3_t val)
+{
+    vst1q_s32_x3 (ptr, val);
+}
+
+void test_vst1q_s64_x3 (int64_t * ptr, int64x2x3_t val)
+{
+    vst1q_s64_x3 (ptr, val);
+}
+
+void test_vst1q_f32_x3 (float32_t * ptr, float32x4x3_t val)
+{
+    vst1q_f32_x3 (ptr, val);
+}
+
+void test_vst1q_p8_x3 (poly8_t * ptr, poly8x16x3_t val)
+{
+    vst1q_p8_x3 (ptr, val);
+}
+
+void test_vst1q_p16_x3 (poly16_t * ptr, poly16x8x3_t val)
+{
+    vst1q_p16_x3 (ptr, val);
+}
+
+
 /* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } }  */
+/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } }  */
 
 /* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } }  */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } }  */
 
 /* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } }  */
+/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } }  */
 
 /* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } }  */
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } }  */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
index 2a4579f..2593c31 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
@@ -10,4 +10,10 @@ void test_vst1q_bf16_x2 (bfloat16_t * ptr, bfloat16x8x2_t val)
     vst1q_bf16_x2 (ptr, val);
 }
 
+void test_vst1q_bf16_x3 (bfloat16_t * ptr, bfloat16x8x3_t val)
+{
+    vst1q_bf16_x3 (ptr, val);
+}
+
 /* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } }  */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } }  */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
index 61a7e55..28e949b 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
@@ -10,4 +10,10 @@ void test_vst1q_f16_x2 (float16_t * ptr, float16x8x2_t val)
     vst1q_f16_x2 (ptr, val);
 }
 
+void test_vst1q_f16_x3 (float16_t * ptr, float16x8x3_t val)
+{
+    vst1q_f16_x3 (ptr, val);
+}
+
 /* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } }  */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } }  */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
index 82f3dad..7878d93 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
@@ -10,4 +10,10 @@ void test_vst1q_p64_x2 (poly64_t * ptr, poly64x2x2_t val)
     vst1q_p64_x2 (ptr, val);
 }
 
+void test_vst1q_p64_x3 (poly64_t * ptr, poly64x2x3_t val)
+{
+    vst1q_p64_x3 (ptr, val);
+}
+
 /* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 1 } }  */
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } }  */