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author | Stuart Henderson <shenders@gcc.gnu.org> | 2011-05-04 11:40:32 +0000 |
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committer | Stuart Henderson <shenders@gcc.gnu.org> | 2011-05-04 11:40:32 +0000 |
commit | 23ee028b82aaf3615dca2639a3443fcb216846cc (patch) | |
tree | e55c9dcce237d2fa1a8c83ca8484be343227f050 /gcc/testsuite | |
parent | 486d04be58c36e11d1d7b99fd3ee120781a618d9 (diff) | |
download | gcc-23ee028b82aaf3615dca2639a3443fcb216846cc.zip gcc-23ee028b82aaf3615dca2639a3443fcb216846cc.tar.gz gcc-23ee028b82aaf3615dca2639a3443fcb216846cc.tar.bz2 |
mcpu-bf512.c: Update to latest silicon revision and remove duplication.
2011-05-04 Stuart Henderson <shenders@gcc.gnu.org>
* gcc.target/bfin/mcpu-bf512.c: Update to latest silicon revision and
remove duplication.
* gcc.target/bfin/mcpu-bf514.c: Likewise.
* gcc.target/bfin/mcpu-bf516.c: Likewise.
* gcc.target/bfin/mcpu-bf518.c: Likewise.
From-SVN: r173370
Diffstat (limited to 'gcc/testsuite')
-rw-r--r-- | gcc/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/bfin/mcpu-bf512.c | 35 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/bfin/mcpu-bf514.c | 35 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/bfin/mcpu-bf516.c | 35 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/bfin/mcpu-bf518.c | 35 |
5 files changed, 16 insertions, 132 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0561c73..32386e5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2011-05-04 Stuart Henderson <shenders@gcc.gnu.org> + + * gcc.target/bfin/mcpu-bf512.c: Update to latest silicon revision and + remove duplication. + * gcc.target/bfin/mcpu-bf514.c: Likewise. + * gcc.target/bfin/mcpu-bf516.c: Likewise. + * gcc.target/bfin/mcpu-bf518.c: Likewise. + 2011-05-03 Tobias Burnus <burnus@net-b.de> PR fortran/18918 diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c index 71fbcf3..fa2d56d 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf512.c @@ -10,39 +10,8 @@ #error "__ADSPBF51x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0000 -#error "__SILICON_REVISION__ is not 0x0000" -#endif - -#ifndef __WORKAROUNDS_ENABLED -#error "__WORKAROUNDS_ENABLED is not defined" -#endif - -#ifdef __WORKAROUND_RETS -#error "__WORKAROUND_RETS is defined" -#endif - -#ifndef __WORKAROUND_SPECULATIVE_LOADS -#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" -#endif - -#ifdef __WORKAROUND_SPECULATIVE_SYNCS -#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" -#endif -/* Test for -mcpu=. */ -/* { dg-do preprocess } */ -/* { dg-bfin-options "-mcpu=bf512" } */ - -#ifndef __ADSPBF512__ -#error "__ADSPBF512__ is not defined" -#endif - -#ifndef __ADSPBF51x__ -#error "__ADSPBF51x__ is not defined" -#endif - -#if __SILICON_REVISION__ != 0x0000 -#error "__SILICON_REVISION__ is not 0x0000" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c index b1ae2a2..f6c0829 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf514.c @@ -10,39 +10,8 @@ #error "__ADSPBF51x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0000 -#error "__SILICON_REVISION__ is not 0x0000" -#endif - -#ifndef __WORKAROUNDS_ENABLED -#error "__WORKAROUNDS_ENABLED is not defined" -#endif - -#ifdef __WORKAROUND_RETS -#error "__WORKAROUND_RETS is defined" -#endif - -#ifndef __WORKAROUND_SPECULATIVE_LOADS -#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" -#endif - -#ifdef __WORKAROUND_SPECULATIVE_SYNCS -#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" -#endif -/* Test for -mcpu=. */ -/* { dg-do preprocess } */ -/* { dg-bfin-options "-mcpu=bf514" } */ - -#ifndef __ADSPBF514__ -#error "__ADSPBF514__ is not defined" -#endif - -#ifndef __ADSPBF51x__ -#error "__ADSPBF51x__ is not defined" -#endif - -#if __SILICON_REVISION__ != 0x0000 -#error "__SILICON_REVISION__ is not 0x0000" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c index 675d265..439b3f4 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf516.c @@ -10,39 +10,8 @@ #error "__ADSPBF51x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0000 -#error "__SILICON_REVISION__ is not 0x0000" -#endif - -#ifndef __WORKAROUNDS_ENABLED -#error "__WORKAROUNDS_ENABLED is not defined" -#endif - -#ifdef __WORKAROUND_RETS -#error "__WORKAROUND_RETS is defined" -#endif - -#ifndef __WORKAROUND_SPECULATIVE_LOADS -#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" -#endif - -#ifdef __WORKAROUND_SPECULATIVE_SYNCS -#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" -#endif -/* Test for -mcpu=. */ -/* { dg-do preprocess } */ -/* { dg-bfin-options "-mcpu=bf516" } */ - -#ifndef __ADSPBF516__ -#error "__ADSPBF516__ is not defined" -#endif - -#ifndef __ADSPBF51x__ -#error "__ADSPBF51x__ is not defined" -#endif - -#if __SILICON_REVISION__ != 0x0000 -#error "__SILICON_REVISION__ is not 0x0000" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED diff --git a/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c b/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c index d067578..aff7f69 100644 --- a/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c +++ b/gcc/testsuite/gcc.target/bfin/mcpu-bf518.c @@ -10,39 +10,8 @@ #error "__ADSPBF51x__ is not defined" #endif -#if __SILICON_REVISION__ != 0x0000 -#error "__SILICON_REVISION__ is not 0x0000" -#endif - -#ifndef __WORKAROUNDS_ENABLED -#error "__WORKAROUNDS_ENABLED is not defined" -#endif - -#ifdef __WORKAROUND_RETS -#error "__WORKAROUND_RETS is defined" -#endif - -#ifndef __WORKAROUND_SPECULATIVE_LOADS -#error "__WORKAROUND_SPECULATIVE_LOADS is not defined" -#endif - -#ifdef __WORKAROUND_SPECULATIVE_SYNCS -#error "__WORKAROUND_SPECULATIVE_SYNCS is defined" -#endif -/* Test for -mcpu=. */ -/* { dg-do preprocess } */ -/* { dg-bfin-options "-mcpu=bf518" } */ - -#ifndef __ADSPBF518__ -#error "__ADSPBF518__ is not defined" -#endif - -#ifndef __ADSPBF51x__ -#error "__ADSPBF51x__ is not defined" -#endif - -#if __SILICON_REVISION__ != 0x0000 -#error "__SILICON_REVISION__ is not 0x0000" +#if __SILICON_REVISION__ != 0x0002 +#error "__SILICON_REVISION__ is not 0x0002" #endif #ifndef __WORKAROUNDS_ENABLED |