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| author | liuhongt <hongtao.liu@intel.com> | 2022-03-29 09:21:21 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2022-05-11 15:35:06 +0800 |
| commit | 1e69bc810272f289e367570cf89d8c72af6124e4 (patch) | |
| tree | 59e486899b81e822cd601a776f59172cad6c3885 /gcc/testsuite | |
| parent | 55aa130ef112c6f2c8ef85c218455464c6b29d60 (diff) | |
| download | gcc-1e69bc810272f289e367570cf89d8c72af6124e4.zip gcc-1e69bc810272f289e367570cf89d8c72af6124e4.tar.gz gcc-1e69bc810272f289e367570cf89d8c72af6124e4.tar.bz2 | |
Optimize movzwl + vmovd/vmovq to vmovw.
Similarly optimize movl + vmovq to vmovd.
gcc/ChangeLog:
PR target/104915
* config/i386/sse.md (*vec_set<mode>_0_zero_extendhi): New
pre_reload define_insn_and_split.
(*vec_setv2di_0_zero_extendhi_1): Ditto.
(*vec_set<mode>_0_zero_extendsi): Ditto.
(*vec_setv2di_0_zero_extendsi_1): Ditto.
(ssewvecmode): New mode attr.
(ssewvecmodelower): Ditto.
(ssepackmodelower): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr104915-vmovd.c: New test.
* gcc.target/i386/pr104915-vmovw.c: New test.
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr104915-vmovd.c | 25 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr104915-vmovw.c | 45 |
2 files changed, 70 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/pr104915-vmovd.c b/gcc/testsuite/gcc.target/i386/pr104915-vmovd.c new file mode 100644 index 0000000..913ff88 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104915-vmovd.c @@ -0,0 +1,25 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times {(?n)vmovd[ \t]+} 3 } } */ +/* { dg-final { scan-assembler-not {(?n)movq[ \t]+} } } */ + +#include<immintrin.h> + +__m128i +foo1 (int* p) +{ + return _mm_set_epi64x (0, (unsigned int) ((*(__m32_u *)p)[0])); +} + +__m256i +foo3 (int* p) +{ + return _mm256_set_epi64x (0, 0, 0, (unsigned int) ((*(__m32_u *)p)[0])); +} + +__m512i +foo5 (int* p) +{ + return _mm512_set_epi64 (0, 0, 0, 0, 0, 0, 0, + (unsigned int) ((*(__m32_u *)p)[0])); +} diff --git a/gcc/testsuite/gcc.target/i386/pr104915-vmovw.c b/gcc/testsuite/gcc.target/i386/pr104915-vmovw.c new file mode 100644 index 0000000..ac47865 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104915-vmovw.c @@ -0,0 +1,45 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx512fp16 -O2" } */ +/* { dg-final { scan-assembler-times {(?n)vmovw[ \t]+} 6 } } */ +/* { dg-final { scan-assembler-not {(?n)mov[dq][ \t]+} } } */ + +#include<immintrin.h> +__m128i +foo (short* p) +{ + return _mm_set_epi32 (0, 0, 0, (unsigned short) ((*(__m16_u *)p)[0])); +} + +__m128i +foo1 (short* p) +{ + return _mm_set_epi64x (0, (unsigned short) ((*(__m16_u *)p)[0])); +} + +__m256i +foo2 (short* p) +{ + return _mm256_set_epi32 (0, 0, 0, 0, 0, 0, 0, + (unsigned short) ((*(__m16_u *)p)[0])); +} + +__m256i +foo3 (short* p) +{ + return _mm256_set_epi64x (0, 0, 0, (unsigned short) ((*(__m16_u *)p)[0])); +} + +__m512i +foo4 (short* p) +{ + return _mm512_set_epi32 (0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, + (unsigned short) ((*(__m16_u *)p)[0])); +} + +__m512i +foo5 (short* p) +{ + return _mm512_set_epi64 (0, 0, 0, 0, 0, 0, 0, + (unsigned short) ((*(__m16_u *)p)[0])); +} |