diff options
author | Cui, Lili <lili.cui@intel.com> | 2025-09-01 10:59:22 +0800 |
---|---|---|
committer | Cui, Lili <lili.cui@intel.com> | 2025-09-01 14:35:59 +0800 |
commit | ae689f89fb4059ba1950117a5b8e457eb46d9747 (patch) | |
tree | e601a21f1e529da8f5bd14c5b40799c240b50cf8 /gcc/testsuite/gcc.target/powerpc/pr46728-10.c | |
parent | 7c6fefedce7c10d4f44a731bcce6865b03a9f473 (diff) | |
download | gcc-master.zip gcc-master.tar.gz gcc-master.tar.bz2 |
The original intention of this code was to allow more allocnos
to share the same register, but this led to expensive allocno
overflows. Extracted a small case (a bit large, see Bugzilla
PR117838 for details) from 548.exchange2_r to analyze this
register allocation issue.
Before improve_allocation function:
a537 (cost 1896, reg42)
a20 (cost 270, reg1)
a13 (cost 144, spill)
a551 (cost 70, reg40)
a5 (cost 43, spill)
a493 (cost 30, reg42)
a499 (cost 12, reg40)
------------------------------
Dump info in improve_allocation function:
Base:
Spilling a493r125 for a5r113
Spilling a573r202 for a5r113
Spilling a499r248 for a13r106
Spilling a551r120 for a13r106
Spilling a20r237 for a551r120
With patch:
Spilling a499r248 for a13r106
Spilling a551r120 for a13r106
Spilling a493r125 for a551r120
------------------------------
After assign_hard_reg (at the end of improve_allocation):
Base:
a537 (cost 1896, reg1)
a20 (cost 270, spill) -----> This is unreasonable
a13 (cost 144, reg40)
a551 (cost 70, reg1)
a5 (cost 43, reg42)
a493 (cost 30, spill)
a499 (cost 12, reg1)
With patch:
a537 (cost 1896, reg42)
a20 (cost 270, reg1)
a13 (cost 144, reg40)
a551 (cost 70, reg42)
a5 (cost 43, spill)
a493 (cost 30, spill)
a499 (cost 12, reg42)
-----------------------------
Collected spec2017 performance on Znver3/Graviton4/EMR/SRF for O2 and Ofast.
No performance regression was observed.
FOR multi-copy O2
SRF: 548.exchange2_r increased by 7.5%, 500.perlbench_r increased by 2.0%.
EMR: 548.exchange2_r increased by 4.5%, 500.perlbench_r increased by 1.7%.
Graviton4: 548.exchange2_r Increased by 2.2%, 511.povray_r increased by 2.8%.
Znver3 : 500.perlbench_r increased by 2.0%.
gcc/ChangeLog:
PR rtl-optimization/117838
* ira-color.cc (improve_allocation): Remove soft conflict related code.
Diffstat (limited to 'gcc/testsuite/gcc.target/powerpc/pr46728-10.c')
0 files changed, 0 insertions, 0 deletions