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authorEzra Sitorus <ezra.sitorus@arm.com>2023-12-07 15:28:43 +0000
committerRichard Earnshaw <rearnsha@arm.com>2023-12-07 17:14:30 +0000
commitef07ae652c25ec04c2e3ef8cec14b0771a809861 (patch)
treef5c19bb13959e63e4dcb21e1dbbea78b99debe04 /gcc/testsuite/gcc.target/arm
parenta69a7c7b6782c5b6f213f1f34af8dbb6541f27bb (diff)
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arm: vst1_types_x3 ACLE intrinsics
This patch is part of a series of patches implementing the _xN variants of the vst1 intrinsic for the arm port. This patch adds the _x3 variants of the vst1 intrinsic. ACLE documents: https://developer.arm.com/documentation/ihi0053/latest/ ISA documents: https://developer.arm.com/documentation/ddi0487/latest/ gcc/ChangeLog: * config/arm/arm_neon.h (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New. (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New. (vst1_f16_x3, vst1_f32_x3): New. (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New. (vst1_bf16_x3): New. * config/arm/arm_neon_builtins.def (vst1_x3): New entries. * config/arm/neon.md (vst1_x3<mode>): New. gcc/testsuite/ChangeLog: * gcc.target/arm/simd/vst1_base_xN_1.c: Add new test. * gcc.target/arm/simd/vst1_bf16_xN_1.c: Add new test. * gcc.target/arm/simd/vst1_fp16_xN_1.c: Add new test. * gcc.target/arm/simd/vst1_p64_xN_1.c: Add new test.
Diffstat (limited to 'gcc/testsuite/gcc.target/arm')
-rw-r--r--gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c63
-rw-r--r--gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c7
-rw-r--r--gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c7
-rw-r--r--gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c7
4 files changed, 77 insertions, 7 deletions
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c
index 575897f..5f820a6 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c
@@ -60,8 +60,63 @@ void test_vst1_p16_x2 (poly16_t * ptr, poly16x4x2_t val)
vst1_p16_x2 (ptr, val);
}
+void test_vst1_u8_x3 (uint8_t * ptr, uint8x8x3_t val)
+{
+ vst1_u8_x3 (ptr, val);
+}
+
+void test_vst1_u16_x3 (uint16_t * ptr, uint16x4x3_t val)
+{
+ vst1_u16_x3 (ptr, val);
+}
+
+void test_vst1_u32_x3 (uint32_t * ptr, uint32x2x3_t val)
+{
+ vst1_u32_x3 (ptr, val);
+}
+
+void test_vst1_u64_x3 (uint64_t * ptr, uint64x1x3_t val)
+{
+ vst1_u64_x3 (ptr, val);
+}
+
+void test_vst1_s8_x3 (int8_t * ptr, int8x8x3_t val)
+{
+ vst1_s8_x3 (ptr, val);
+}
+
+void test_vst1_s16_x3 (int16_t * ptr, int16x4x3_t val)
+{
+ vst1_s16_x3 (ptr, val);
+}
+
+void test_vst1_s32_x3 (int32_t * ptr, int32x2x3_t val)
+{
+ vst1_s32_x3 (ptr, val);
+}
+
+void test_vst1_s64_x3 (int64_t * ptr, int64x1x3_t val)
+{
+ vst1_s64_x3 (ptr, val);
+}
+
+void test_vst1_f32_x3 (float32_t * ptr, float32x2x3_t val)
+{
+ vst1_f32_x3 (ptr, val);
+}
+
+void test_vst1_p8_x3 (poly8_t * ptr, poly8x8x3_t val)
+{
+ vst1_p8_x3 (ptr, val);
+}
+
+void test_vst1_p16_x3 (poly16_t * ptr, poly16x4x3_t val)
+{
+ vst1_p16_x3 (ptr, val);
+}
+
-/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
-/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
-/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */
+/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
+/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c
index 213fd20..a3a00ea 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c
@@ -10,4 +10,9 @@ void test_vst1_bf16_x2 (bfloat16_t * ptr, bfloat16x4x2_t val)
vst1_bf16_x2 (ptr, val);
}
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */
+void test_vst1_bf16_x3 (bfloat16_t * ptr, bfloat16x4x3_t val)
+{
+ vst1_bf16_x3 (ptr, val);
+}
+
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c
index 523aec9..0a6863e 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c
@@ -10,4 +10,9 @@ void test_vst1_f16_x2 (float16_t * ptr, float16x4x2_t val)
vst1_f16_x2 (ptr, val);
}
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */
+void test_vst1_f16_x3 (float16_t * ptr, float16x4x3_t val)
+{
+ vst1_f16_x3 (ptr, val);
+}
+
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c
index f590ebd..5dbd604 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c
@@ -10,4 +10,9 @@ void test_vst1_p64_x2 (poly64_t * ptr, poly64x1x2_t val)
vst1_p64_x2 (ptr, val);
}
-/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 1 } } */ \ No newline at end of file
+void test_vst1_p64_x3 (poly64_t * ptr, poly64x1x3_t val)
+{
+ vst1_p64_x3 (ptr, val);
+}
+
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */ \ No newline at end of file