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authorEzra Sitorus <ezra.sitorus@arm.com>2023-12-07 15:36:52 +0000
committerRichard Earnshaw <rearnsha@arm.com>2023-12-07 17:15:36 +0000
commit4ad77f883c178679f1dbb3a5603f811e022080bb (patch)
treebb9ca91b63da4250053d673887d4c5f779459a98 /gcc/testsuite/gcc.target/arm
parent2d58d53c9e0eed83faa9254f8d3ec0ddd54812d8 (diff)
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arm: vst1q_types_x4 ACLE intrinsics
This patch is part of a series of patches implementing the _xN variants of the vst1q intrinsic for the arm port. This patch adds the _x4 variants of the vst1q intrinsic. ACLE: https://developer.arm.com/documentation/ihi0053/latest/ ISA documents: https://developer.arm.com/documentation/ddi0487/latest/ gcc/ChangeLog: * config/arm/arm_neon.h (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New. (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New. (vst1q_f16_x4, vst1q_f32_x4): New. (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New. (vst1q_bf16_x4): New. * config/arm/arm_neon_builtins.def (vst1q_x4): New entries. * config/arm/neon.md (neon_vst1q_x4<mode>): New. gcc/testsuite/ChangeLog: * gcc.target/arm/simd/vst1q_base_xN_1.c: Add new tests. * gcc.target/arm/simd/vst1q_bf16_xN_1.c: Add new tests. * gcc.target/arm/simd/vst1q_fp16_xN_1.c: Add new tests. * gcc.target/arm/simd/vst1q_p64_xN_1.c: Add new tests.
Diffstat (limited to 'gcc/testsuite/gcc.target/arm')
-rw-r--r--gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c59
-rw-r--r--gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c8
-rw-r--r--gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c6
-rw-r--r--gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c6
4 files changed, 78 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
index 838da09..5a63956 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
@@ -115,15 +115,74 @@ void test_vst1q_p16_x3 (poly16_t * ptr, poly16x8x3_t val)
vst1q_p16_x3 (ptr, val);
}
+void test_vst1q_u8_x4 (uint8_t * ptr, uint8x16x4_t val)
+{
+ vst1q_u8_x4 (ptr, val);
+}
+
+void test_vst1q_u16_x4 (uint16_t * ptr, uint16x8x4_t val)
+{
+ vst1q_u16_x4 (ptr, val);
+}
+
+void test_vst1q_u32_x4 (uint32_t * ptr, uint32x4x4_t val)
+{
+ vst1q_u32_x4 (ptr, val);
+}
+
+void test_vst1q_u64_x4 (uint64_t * ptr, uint64x2x4_t val)
+{
+ vst1q_u64_x4 (ptr, val);
+}
+
+void test_vst1q_s8_x4 (int8_t * ptr, int8x16x4_t val)
+{
+ vst1q_s8_x4 (ptr, val);
+}
+
+void test_vst1q_s16_x4 (int16_t * ptr, int16x8x4_t val)
+{
+ vst1q_s16_x4 (ptr, val);
+}
+
+void test_vst1q_s32_x4 (int32_t * ptr, int32x4x4_t val)
+{
+ vst1q_s32_x4 (ptr, val);
+}
+
+void test_vst1q_s64_x4 (int64_t * ptr, int64x2x4_t val)
+{
+ vst1q_s64_x4 (ptr, val);
+}
+
+void test_vst1q_f32_x4 (float32_t * ptr, float32x4x4_t val)
+{
+ vst1q_f32_x4 (ptr, val);
+}
+
+void test_vst1q_p8_x4 (poly8_t * ptr, poly8x16x4_t val)
+{
+ vst1q_p8_x4 (ptr, val);
+}
+
+void test_vst1q_p16_x4 (poly16_t * ptr, poly16x8x4_t val)
+{
+ vst1q_p16_x4 (ptr, val);
+}
+
/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
+/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
+/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */
/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
index 2593c31..84fa850 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
@@ -15,5 +15,11 @@ void test_vst1q_bf16_x3 (bfloat16_t * ptr, bfloat16x8x3_t val)
vst1q_bf16_x3 (ptr, val);
}
+void test_vst1q_bf16_x4 (bfloat16_t * ptr, bfloat16x8x4_t val)
+{
+ vst1q_bf16_x4 (ptr, val);
+}
+
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */ \ No newline at end of file
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
index 28e949b..5b13edf 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
@@ -15,5 +15,11 @@ void test_vst1q_f16_x3 (float16_t * ptr, float16x8x3_t val)
vst1q_f16_x3 (ptr, val);
}
+void test_vst1q_f16_x4 (float16_t * ptr, float16x8x4_t val)
+{
+ vst1q_f16_x4 (ptr, val);
+}
+
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
index 7878d93..f49917d 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
@@ -15,5 +15,11 @@ void test_vst1q_p64_x3 (poly64_t * ptr, poly64x2x3_t val)
vst1q_p64_x3 (ptr, val);
}
+void test_vst1q_p64_x4 (poly64_t * ptr, poly64x2x4_t val)
+{
+ vst1q_p64_x4 (ptr, val);
+}
+
/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 1 } } */
/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */
+/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */