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authorRichard Henderson <rth@redhat.com>2001-12-31 15:16:08 -0800
committerRichard Henderson <rth@gcc.gnu.org>2001-12-31 15:16:08 -0800
commit3ada20eee166f36c91019acb2878bdcc5a24aeb1 (patch)
tree7d850bce20a5f26a1ae39d2f9c74b5c8ed4ace75 /gcc/testsuite/gcc.dg/asm-5.c
parent5a598cccec409566d2f6905c843b3218aefc8beb (diff)
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regrename.c (build_def_use): Don't rename asm operands that were originally hard registers.
* regrename.c (build_def_use): Don't rename asm operands that were originally hard registers. (copyprop_hardreg_forward_1): Likewise. (find_oldest_value_reg): Copy ORIGINAL_REGNO from source. * varasm.c (make_decl_rtl): Use gen_rtx_raw_REG. Set ORIGINAL_REGNO. * gcc.dg/asm-5.c: New. From-SVN: r48435
Diffstat (limited to 'gcc/testsuite/gcc.dg/asm-5.c')
-rw-r--r--gcc/testsuite/gcc.dg/asm-5.c82
1 files changed, 82 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.dg/asm-5.c b/gcc/testsuite/gcc.dg/asm-5.c
new file mode 100644
index 0000000..7b8d0f2
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/asm-5.c
@@ -0,0 +1,82 @@
+/* Asm operands that are given as hard registers must keep the same
+ hard register all the way through compilation. Example derived
+ from glibc source. */
+/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-options "-O2 -frename-registers -fcprop-registers" } */
+/* { dg-final { scan-assembler "callsys1 .0 .19 .0 .16 .17" } } */
+/* { dg-final { scan-assembler "callsys2 .0 .19 .0 .16 .17" } } */
+
+struct stat {
+ int dummy;
+};
+
+struct kernel_stat {
+ int dummy;
+};
+
+extern int xstat_conv (int vers, struct kernel_stat *kbuf, void *ubuf);
+extern int *__errno_location (void) __attribute__ ((__const__));
+
+int
+__fxstat (int vers, int fd, struct stat *buf)
+{
+ struct kernel_stat kbuf;
+ int result;
+
+ if (vers == 0)
+ return
+ ({
+ long _sc_ret, _sc_err;
+ {
+ register long _sc_0 __asm__("$0");
+ register long _sc_16 __asm__("$16");
+ register long _sc_17 __asm__("$17");
+ register long _sc_19 __asm__("$19");
+ _sc_0 = 91;
+ _sc_16 = (long) (fd);
+ _sc_17 = (long) (((struct kernel_stat *) buf));
+ __asm__("callsys1 %0 %1 %2 %3 %4"
+ : "=r"(_sc_0), "=r"(_sc_19)
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17)
+ : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
+ "$22", "$23", "$24", "$25", "$27", "$28", "memory");
+ _sc_ret = _sc_0, _sc_err = _sc_19;
+ }
+ if (_sc_err)
+ {
+ (*__errno_location ()) = (_sc_ret);
+ _sc_ret = -1L;
+ }
+ _sc_ret;
+ });
+
+ result =
+ ({
+ long _sc_ret, _sc_err;
+ {
+ register long _sc_0 __asm__("$0");
+ register long _sc_16 __asm__("$16");
+ register long _sc_17 __asm__("$17");
+ register long _sc_19 __asm__("$19");
+ _sc_0 = 91;
+ _sc_16 = (long) (fd);
+ _sc_17 = (long) ((&kbuf));
+ __asm__("callsys2 %0 %1 %2 %3 %4"
+ : "=r"(_sc_0), "=r"(_sc_19)
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17)
+ : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
+ "$22", "$23", "$24", "$25", "$27", "$28", "memory");
+ _sc_ret = _sc_0, _sc_err = _sc_19;
+ }
+ if (_sc_err)
+ {
+ (*__errno_location ()) = (_sc_ret);
+ _sc_ret = -1L;
+ }
+ _sc_ret;
+ });
+ if (result == 0)
+ result = xstat_conv (vers, &kbuf, buf);
+
+ return result;
+}