[RISC-V] Fix unreported code quality regression with single bit manipulations

I was reviewing some code recently and spotted an oddity.  In a few places we
were emitting andi dst,src,-1 and in others [x]ori dst,src,0. Those are
obviously nops and we should get rid of them.

Most of these are coming from a split part of a couple define_insn_and_split
patterns added back in late 2022, so this is an unreported 13, 14 & 15 code
quality regression (verified on godbolt, https://godbolt.org/z/EPszox5Kd).
Essentially the split part is matching over-aggressively and splitting what
should be a trivial bitmanip insn such as bset, bclr or binv into a nop logical
with a bit twiddle.

Since the split portions trigger post-reload nothing comes along to remove the
nop logical operations.

The fix is trivial.  Just refine the condition.  I considered refining the
operand predicates too.  Both are valid approaches.  I noticed the formatting
was goofy, so fixed that while I was in there.

I'm aware of one other similar case, but I haven't concluded if it's a
regression or not.

Tested in my tester.  Waiting for pre-commit CI to do its thing.

Jeff

gcc/
	* config/riscv/bitmanip.md (*<or_optab>i<mode>_extrabit): Reject cases
	where we only need to twiddle one bit.  Fix formatting.
	(*andi<mode>extrabit): Likewise.

gcc/testsuite/

	* gcc.target/riscv/redundant-andi.c: New test.
	* gcc.target/riscv/redundant-ori.c: Likewise

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