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| author | Ezra Sitorus <ezra.sitorus@arm.com> | 2023-12-07 15:21:54 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2023-12-07 17:13:36 +0000 |
| commit | a1a0cdf21bb6a076e98658d815645d8ad1193840 (patch) | |
| tree | 34dce4108a6badbe5d31dd82a96fe51118f0aca3 /gcc/testsuite/c-c++-common/Wdangling-else-4.c | |
| parent | cd3c1cfde73ac946be218eaa5d1fdf4e0cb2d61b (diff) | |
| download | gcc-a1a0cdf21bb6a076e98658d815645d8ad1193840.zip gcc-a1a0cdf21bb6a076e98658d815645d8ad1193840.tar.gz gcc-a1a0cdf21bb6a076e98658d815645d8ad1193840.tar.bz2 | |
arm: vld1q_types_x2 ACLE intrinsics
This patch is part of a series of patches implementing the _xN
variants of the vld1q intrinsic for the arm port. This patch adds the
_x2 variants of the vld1q intrinsic.
ACLE documents:
https://developer.arm.com/documentation/ihi0053/latest/
ISA documents:
https://developer.arm.com/documentation/ddi0487/latest/
gcc/ChangeLog:
* config/arm/arm_neon.h
(vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
(vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
(vld1q_f16_x2, vld1q_f32_x2): New.
(vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
(vld1q_bf16_x2): New.
* config/arm/arm_neon_builtins.def (vld1_x2): New entries.
* config/arm/neon.md (vld1_x2<mode>): New.
gcc/testsuite/ChangeLog:
* gcc.target/arm/simd/vld1q_base_xN_1.c: Add new test.
* gcc.target/arm/simd/vld1q_bf16_xN_1.c: Add new test.
* gcc.target/arm/simd/vld1q_fp16_xN_1.c: Add new test.
* gcc.target/arm/simd/vld1q_p64_xN_1.c: Add new test.
Diffstat (limited to 'gcc/testsuite/c-c++-common/Wdangling-else-4.c')
0 files changed, 0 insertions, 0 deletions