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| author | Richard Sandiford <richard.sandiford@linaro.org> | 2011-09-14 12:17:03 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2011-09-14 12:17:03 +0000 |
| commit | fafaf06fba1bd3a03b1518666160d9765965a0db (patch) | |
| tree | 2d7c617c46739ec63501c878ce8a8dd6c1a0d04f /gcc/simplify-rtx.c | |
| parent | 35511751930bbd5418e306877c27306c167aec96 (diff) | |
| download | gcc-fafaf06fba1bd3a03b1518666160d9765965a0db.zip gcc-fafaf06fba1bd3a03b1518666160d9765965a0db.tar.gz gcc-fafaf06fba1bd3a03b1518666160d9765965a0db.tar.bz2 | |
simplify-rtx.c (simplify_subreg): Check that the inner mode is a scalar integer before applying integer-only...
gcc/
* simplify-rtx.c (simplify_subreg): Check that the inner mode is
a scalar integer before applying integer-only optimisations to
inner arithmetic.
From-SVN: r178848
Diffstat (limited to 'gcc/simplify-rtx.c')
| -rw-r--r-- | gcc/simplify-rtx.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index ef5ea1a..d81e3a6 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -5611,6 +5611,7 @@ simplify_subreg (enum machine_mode outermode, rtx op, /* Optimize SUBREG truncations of zero and sign extended values. */ if ((GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND) + && SCALAR_INT_MODE_P (innermode) && GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode)) { unsigned int bitpos = subreg_lsb_1 (outermode, innermode, byte); @@ -5649,6 +5650,7 @@ simplify_subreg (enum machine_mode outermode, rtx op, if ((GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) && SCALAR_INT_MODE_P (outermode) + && SCALAR_INT_MODE_P (innermode) /* Ensure that OUTERMODE is at least twice as wide as the INNERMODE to avoid the possibility that an outer LSHIFTRT shifts by more than the sign extension's sign_bit_copies and introduces zeros @@ -5668,6 +5670,7 @@ simplify_subreg (enum machine_mode outermode, rtx op, if ((GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) && SCALAR_INT_MODE_P (outermode) + && SCALAR_INT_MODE_P (innermode) && GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode) && CONST_INT_P (XEXP (op, 1)) && GET_CODE (XEXP (op, 0)) == ZERO_EXTEND @@ -5682,6 +5685,7 @@ simplify_subreg (enum machine_mode outermode, rtx op, the outer subreg is effectively a truncation to the original mode. */ if (GET_CODE (op) == ASHIFT && SCALAR_INT_MODE_P (outermode) + && SCALAR_INT_MODE_P (innermode) && GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode) && CONST_INT_P (XEXP (op, 1)) && (GET_CODE (XEXP (op, 0)) == ZERO_EXTEND @@ -5695,7 +5699,7 @@ simplify_subreg (enum machine_mode outermode, rtx op, /* Recognize a word extraction from a multi-word subreg. */ if ((GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) - && SCALAR_INT_MODE_P (outermode) + && SCALAR_INT_MODE_P (innermode) && GET_MODE_PRECISION (outermode) >= BITS_PER_WORD && GET_MODE_PRECISION (innermode) >= (2 * GET_MODE_PRECISION (outermode)) && CONST_INT_P (XEXP (op, 1)) @@ -5717,6 +5721,7 @@ simplify_subreg (enum machine_mode outermode, rtx op, if ((GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) + && SCALAR_INT_MODE_P (innermode) && MEM_P (XEXP (op, 0)) && CONST_INT_P (XEXP (op, 1)) && GET_MODE_SIZE (outermode) < GET_MODE_SIZE (GET_MODE (op)) |