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author | Roger Sayle <roger@eyesopen.com> | 2006-05-30 15:32:52 +0000 |
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committer | Roger Sayle <sayle@gcc.gnu.org> | 2006-05-30 15:32:52 +0000 |
commit | 70233f378882c295d33065075e476487c1bd1729 (patch) | |
tree | 6d1370f585fb59eba673c1d1c7a7b0721cf849ac /gcc/simplify-rtx.c | |
parent | d117b270e2cb7841dd739a514fe8fac48f2225dd (diff) | |
download | gcc-70233f378882c295d33065075e476487c1bd1729.zip gcc-70233f378882c295d33065075e476487c1bd1729.tar.gz gcc-70233f378882c295d33065075e476487c1bd1729.tar.bz2 |
simplify-rtx.c (simplify_binary_operation): Unfactor the shift and rotate cases.
* simplify-rtx.c (simplify_binary_operation): Unfactor the shift
and rotate cases.
<LSHIFTRT>: Optimize (lshiftrt (clz X) C) as (eq X 0) where C is
log2(GET_MODE_BITSIZE(X)) on targets with the appropriate semantics.
* gcc.target/ppc-eq0-1.c: New test case.
* gcc.target/ppc-negeq0-1.c: New test case.
From-SVN: r114239
Diffstat (limited to 'gcc/simplify-rtx.c')
-rw-r--r-- | gcc/simplify-rtx.c | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index c51ca9e..65b1d19 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -2436,21 +2436,45 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, case ROTATERT: case ROTATE: case ASHIFTRT: + if (trueop1 == CONST0_RTX (mode)) + return op0; + if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1)) + return op0; /* Rotating ~0 always results in ~0. */ if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode) && ! side_effects_p (op1)) return op0; - - /* Fall through.... */ + break; case ASHIFT: case SS_ASHIFT: + if (trueop1 == CONST0_RTX (mode)) + return op0; + if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1)) + return op0; + break; + case LSHIFTRT: if (trueop1 == CONST0_RTX (mode)) return op0; if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1)) return op0; + /* Optimize (lshiftrt (clz X) C) as (eq X 0). */ + if (GET_CODE (op0) == CLZ + && GET_CODE (trueop1) == CONST_INT + && STORE_FLAG_VALUE == 1 + && INTVAL (trueop1) < width) + { + enum machine_mode imode = GET_MODE (XEXP (op0, 0)); + unsigned HOST_WIDE_INT zero_val = 0; + + if (CLZ_DEFINED_VALUE_AT_ZERO (imode, zero_val) + && zero_val == GET_MODE_BITSIZE (imode) + && INTVAL (trueop1) == exact_log2 (zero_val)) + return simplify_gen_relational (EQ, mode, imode, + XEXP (op0, 0), const0_rtx); + } break; case SMIN: |