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author | Roger Sayle <roger@eyesopen.com> | 2005-02-23 18:20:52 +0000 |
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committer | Roger Sayle <sayle@gcc.gnu.org> | 2005-02-23 18:20:52 +0000 |
commit | 61961eff56844e37bf13a73b489292902a13ffdd (patch) | |
tree | 96f5f39f15b7631322e11e381c095d01a16dce65 /gcc/simplify-rtx.c | |
parent | 1628a835c0f33c27f2c29b2fd38cf922a4f36210 (diff) | |
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re PR target/20018 ([ia64] unable to find a register to spill in class`PR_REG')
PR target/20018
PR rtl-optimization/20097
* simplify-rtx.c (simplify_relational_operation_1): Avoid creating
BImode SUBREGs of SImode registers which confuse the ia64 backend.
From-SVN: r95461
Diffstat (limited to 'gcc/simplify-rtx.c')
-rw-r--r-- | gcc/simplify-rtx.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index b7132ed..a2cd612 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -2887,6 +2887,8 @@ simplify_relational_operation_1 (enum rtx_code code, enum machine_mode mode, && op1 == const0_rtx && GET_MODE_CLASS (mode) == MODE_INT && cmp_mode != VOIDmode + /* ??? Work-around BImode bugs in the ia64 backend. */ + && mode != BImode && cmp_mode != BImode && nonzero_bits (op0, cmp_mode) == 1 && STORE_FLAG_VALUE == 1) |