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| author | Uros Bizjak <ubizjak@gmail.com> | 2024-11-27 20:45:25 +0100 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2024-11-27 20:46:46 +0100 |
| commit | 093584abb854559393e36cd4cdcf9dc4862dd046 (patch) | |
| tree | 9a168e1fa9991bdb1bd24d59adaf352a7ca290cd /gcc/rust | |
| parent | bca515ff1893fe4ca1a9042364af3c43f93a397c (diff) | |
| download | gcc-093584abb854559393e36cd4cdcf9dc4862dd046.zip gcc-093584abb854559393e36cd4cdcf9dc4862dd046.tar.gz gcc-093584abb854559393e36cd4cdcf9dc4862dd046.tar.bz2 | |
i386: x86 can use x >> y for x >> 32+y [PR36503]
x86 targets mask 32-bit shifts with a 5-bit mask (and 64-bit with 6-bit mask),
so they can use x >> y instead of x >> 32+y.
The optimization converts:
leal 32(%rsi), %ecx
sall %cl, %eax
to:
sall %cl, %eax
PR target/36503
gcc/ChangeLog:
* config/i386/i386.md (*ashl<mode>3_add):
New define_insn_and_split pattern.
(*ashl<mode>3_add_1): Ditto.
(*<insn><mode>3_add): Ditto.
(*<insn><mode>3_add_1): Ditto.
(*ashl<mode>3_sub): Rename from *ashl<mode>3_negcnt.
(*ashl<mode>3_sub_1): Rename from *ashl<mode>3_negcnt_1.
(*<insn><mode>3_sub): Rename from *<insn><mode>3_negcnt.
(*<insn><mode>3_sub_1): Rename from *<insn><mode>3_negcnt_1.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr36503-3.c: New test.
* gcc.target/i386/pr36503-4.c: New test.
Diffstat (limited to 'gcc/rust')
0 files changed, 0 insertions, 0 deletions