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authorPengfei Li <Pengfei.Li2@arm.com>2025-04-29 19:14:42 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2025-04-29 19:14:42 +0100
commitd84fbc516ea57de7e88fce76ff6f342ee808c02e (patch)
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parent69669180d29cc420b1b1ac86530a4f9573748d81 (diff)
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simplify-rtx: Combine bitwise operations in more cases
This patch transforms RTL expressions of the form (subreg (not X)) into (not (subreg X)) if the subreg is an operand of another binary logical operation. This transformation can expose opportunities to combine more logical operations. For example, it improves the codegen of the following AArch64 NEON intrinsics: vandq_s64(vreinterpretq_s64_s32(vmvnq_s32(a)), vreinterpretq_s64_s32(b)); from: not v0.16b, v0.16b and v0.16b, v0.16b, v1.16b to: bic v0.16b, v1.16b, v0.16b Regression tested on x86_64-linux-gnu, arm-linux-gnueabihf and aarch64-linux-gnu. gcc/ChangeLog: * simplify-rtx.cc (non_paradoxical_subreg_not_p): New function for pattern match of (subreg (not X)). (simplify_with_subreg_not): New function for simplification.
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