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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-05-15 09:55:44 +0100 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2023-05-15 09:55:44 +0100 |
| commit | e90791e5a02b021d22ffb4c36673b9af623e2063 (patch) | |
| tree | b5f51ed43487cd5687023fd889b7c6de8de4634f /gcc/rust/backend/rust-compile-base.h | |
| parent | 676d33f95eede2dfa629c9b0174c15cc55c4a45a (diff) | |
| download | gcc-e90791e5a02b021d22ffb4c36673b9af623e2063.zip gcc-e90791e5a02b021d22ffb4c36673b9af623e2063.tar.gz gcc-e90791e5a02b021d22ffb4c36673b9af623e2063.tar.bz2 | |
aarch64: PR target/99195 annotate vector compare patterns for vec-concat-zero
This instalment of the series goes through the vector comparison patterns in the backend.
One wart are the int64x1_t comparisons that this patch doesn't touch.
Those are a bit trickier because they have define_insn_and_split mechanisms for falling back to
GP reg comparisons after reload and I don't think a simple annotation will catch those cases correctly.
Those will need more custom thinking.
As said, this patch doesn't touch those and is a decent straightforward improvement on its own.
Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.
gcc/ChangeLog:
PR target/99195
* config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
(aarch64_cm<optab><mode><vczle><vczbe>): ... This.
(aarch64_cmtst<mode>): Rename to...
(aarch64_cmtst<mode><vczle><vczbe>): ... This.
(*aarch64_cmtst_same_<mode>): Rename to...
(*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
(*aarch64_cmtstdi): Rename to...
(*aarch64_cmtstdi<vczle><vczbe>): ... This.
(aarch64_fac<optab><mode>): Rename to...
(aarch64_fac<optab><mode><vczle><vczbe>): ... This.
gcc/testsuite/ChangeLog:
PR target/99195
* gcc.target/aarch64/simd/pr99195_7.c: New test.
Diffstat (limited to 'gcc/rust/backend/rust-compile-base.h')
0 files changed, 0 insertions, 0 deletions