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authorTrevor Saunders <tbsaunde+gcc@tbsaunde.org>2015-10-21 21:05:02 +0000
committerTrevor Saunders <tbsaunde@gcc.gnu.org>2015-10-21 21:05:02 +0000
commite90bedf52c86a7b4e2e0a1f8a5a1450725cb95b6 (patch)
tree7e4247b26f99c762d570b1e1456c1d1e1167819e /gcc/reorg.c
parent0a798c16c13970d020bc5b93c1aceac9ec5dd7a1 (diff)
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unconditionally compile most of the delay slot code
gcc/ChangeLog: 2015-10-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * cfgrtl.c (pass_free_cfg::execute): Adjust. * final.c (dbr_sequence_length): Always define. (shorten_branches): Adjust. * genattr-common.c (main): Always define DELAY_SLOTS. * genattr.c (main): Unconditionally declare functions and define macros related to delay slots. * genattrtab.c (write_eligible_delay): Adjust. (main): Always write out delay slot functions. * opts.c (default_options_table): Adjust. * reorg.c (redirect_with_delay_slots_safe_p): Likewise. (redirect_with_delay_list_safe_p): Likewise. (fill_simple_delay_slots): Likewise. (fill_slots_from_thread): Likewise. (make_return_insns): Likewise. (dbr_schedule): Likewise. (rest_of_handle_delay_slots): Likewise. (pass_delay_slots::gate): Likewise. * toplev.c (process_options): Likewise. From-SVN: r229145
Diffstat (limited to 'gcc/reorg.c')
-rw-r--r--gcc/reorg.c82
1 files changed, 31 insertions, 51 deletions
diff --git a/gcc/reorg.c b/gcc/reorg.c
index c51e03c..47b938b 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -131,15 +131,6 @@ along with GCC; see the file COPYING3. If not see
#include "target.h"
#include "tree-pass.h"
-#ifdef DELAY_SLOTS
-
-#ifndef ANNUL_IFTRUE_SLOTS
-#define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
-#endif
-#ifndef ANNUL_IFFALSE_SLOTS
-#define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
-#endif
-
/* First, some functions that were used before GCC got a control flow graph.
These functions are now only used here in reorg.c, and have therefore
@@ -219,9 +210,6 @@ static void add_to_delay_list (rtx_insn *, vec<rtx_insn *> *);
static rtx_insn *delete_from_delay_slot (rtx_insn *);
static void delete_scheduled_jump (rtx_insn *);
static void note_delay_statistics (int, int);
-#if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
-static void optimize_skip (rtx_jump_insn *, vec<rtx_insn *> *);
-#endif
static int get_jump_flags (const rtx_insn *, rtx);
static int mostly_true_jump (rtx);
static rtx get_branch_condition (const rtx_insn *, rtx);
@@ -717,8 +705,6 @@ note_delay_statistics (int slots_filled, int index)
num_filled_delays[index][slots_filled][reorg_pass_number]++;
}
-#if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
-
/* Optimize the following cases:
1. When a conditional branch skips over only one instruction,
@@ -818,7 +804,6 @@ optimize_skip (rtx_jump_insn *insn, vec<rtx_insn *> *delay_list)
INSN_ANNULLED_BRANCH_P (insn) = 1;
}
}
-#endif
/* Encode and return branch direction and prediction information for
INSN assuming it will jump to LABEL.
@@ -973,12 +958,12 @@ redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
flags = get_jump_flags (jump, newlabel);
for (i = 1; i < pat->len (); i++)
if (! (
-#ifdef ANNUL_IFFALSE_SLOTS
+#if ANNUL_IFFALSE_SLOTS
(INSN_ANNULLED_BRANCH_P (jump)
&& INSN_FROM_TARGET_P (pat->insn (i)))
? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
#endif
-#ifdef ANNUL_IFTRUE_SLOTS
+#if ANNUL_IFTRUE_SLOTS
(INSN_ANNULLED_BRANCH_P (jump)
&& ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
@@ -1005,12 +990,12 @@ redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
unsigned int i = 0;
for (; i < delay_insns; i++)
if (! (
-#ifdef ANNUL_IFFALSE_SLOTS
+#if ANNUL_IFFALSE_SLOTS
(INSN_ANNULLED_BRANCH_P (jump)
&& INSN_FROM_TARGET_P (delay_list[i]))
? eligible_for_annul_false (jump, i, delay_list[i], flags) :
#endif
-#ifdef ANNUL_IFTRUE_SLOTS
+#if ANNUL_IFTRUE_SLOTS
(INSN_ANNULLED_BRANCH_P (jump)
&& ! INSN_FROM_TARGET_P (delay_list[i]))
? eligible_for_annul_true (jump, i, delay_list[i], flags) :
@@ -2096,8 +2081,8 @@ fill_simple_delay_slots (int non_jumps_p)
/* If all needed slots haven't been filled, we come here. */
/* Try to optimize case of jumping around a single insn. */
-#if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
- if (slots_filled != slots_to_fill
+ if ((ANNUL_IFTRUE_SLOTS || ANNUL_IFFALSE_SLOTS)
+ && slots_filled != slots_to_fill
&& delay_list.is_empty ()
&& JUMP_P (insn)
&& (condjump_p (insn) || condjump_in_parallel_p (insn))
@@ -2107,7 +2092,6 @@ fill_simple_delay_slots (int non_jumps_p)
if (!delay_list.is_empty ())
slots_filled += 1;
}
-#endif
/* Try to get insns from beyond the insn needing the delay slot.
These insns can neither set or reference resources set in insns being
@@ -2494,13 +2478,8 @@ fill_slots_from_thread (rtx_jump_insn *insn, rtx condition,
goto winner;
}
else if (0
-#ifdef ANNUL_IFTRUE_SLOTS
- || ! thread_if_true
-#endif
-#ifdef ANNUL_IFFALSE_SLOTS
- || thread_if_true
-#endif
- )
+ || (ANNUL_IFTRUE_SLOTS && ! thread_if_true)
+ || (ANNUL_IFFALSE_SLOTS && thread_if_true))
{
old_trial = trial;
trial = try_split (pat, trial, 0);
@@ -3611,13 +3590,13 @@ make_return_insns (rtx_insn *first)
{
for (i = 1; i < XVECLEN (pat, 0); i++)
if (! (
-#ifdef ANNUL_IFFALSE_SLOTS
+#if ANNUL_IFFALSE_SLOTS
(INSN_ANNULLED_BRANCH_P (jump_insn)
&& INSN_FROM_TARGET_P (pat->insn (i)))
? eligible_for_annul_false (jump_insn, i - 1,
pat->insn (i), flags) :
#endif
-#ifdef ANNUL_IFTRUE_SLOTS
+#if ANNUL_IFTRUE_SLOTS
(INSN_ANNULLED_BRANCH_P (jump_insn)
&& ! INSN_FROM_TARGET_P (pat->insn (i)))
? eligible_for_annul_true (jump_insn, i - 1,
@@ -3852,21 +3831,24 @@ dbr_schedule (rtx_insn *first)
}
}
fprintf (dump_file, "\n");
-#if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
- fprintf (dump_file, ";; Reorg annuls: ");
- need_comma = 0;
- for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
+
+ if (ANNUL_IFTRUE_SLOTS || ANNUL_IFFALSE_SLOTS)
{
- if (total_annul_slots[j])
+ fprintf (dump_file, ";; Reorg annuls: ");
+ need_comma = 0;
+ for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
{
- if (need_comma)
- fprintf (dump_file, ", ");
- need_comma = 1;
- fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
+ if (total_annul_slots[j])
+ {
+ if (need_comma)
+ fprintf (dump_file, ", ");
+ need_comma = 1;
+ fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
+ }
}
+ fprintf (dump_file, "\n");
}
- fprintf (dump_file, "\n");
-#endif
+
fprintf (dump_file, "\n");
}
@@ -3880,15 +3862,14 @@ dbr_schedule (rtx_insn *first)
free (uid_to_ruid);
crtl->dbr_scheduled_p = true;
}
-#endif /* DELAY_SLOTS */
/* Run delay slot optimization. */
static unsigned int
rest_of_handle_delay_slots (void)
{
-#ifdef DELAY_SLOTS
- dbr_schedule (get_insns ());
-#endif
+ if (DELAY_SLOTS)
+ dbr_schedule (get_insns ());
+
return 0;
}
@@ -3926,12 +3907,11 @@ public:
bool
pass_delay_slots::gate (function *)
{
-#ifdef DELAY_SLOTS
/* At -O0 dataflow info isn't updated after RA. */
- return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
-#else
- return 0;
-#endif
+ if (DELAY_SLOTS)
+ return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
+
+ return false;
}
} // anon namespace