recog: Fix a constrain_operands corner case [PR97144]

aarch64's *add<mode>3_poly_1 has a pattern with the constraints:

  "=...,r,&r"
  "...,0,rk"
  "...,Uai,Uat"

i.e. the penultimate alternative requires operands 0 and 1 to match,
but the final alternative does not allow them to match.

The register allocators dealt with this correctly, and so used
different input and output registers for instructions with Uat
operands.  However, constrain_operands carried the penultimate
alternative's matching rule over to the final alternative,
so it would essentially ignore the earlyclobber.  This in turn
allowed postreload to convert a correct Uat pairing into an
incorrect one.

The fix is simple: recompute the matching information for each
alternative.

gcc/
	PR rtl-optimization/97144
	* recog.c (constrain_operands): Initialize matching_operand
	for each alternative, rather than only doing it once.

gcc/testsuite/
	PR rtl-optimization/97144
	* gcc.c-torture/compile/pr97144.c: New test.
	* gcc.target/aarch64/sve/pr97144.c: Likewise.

1 files changed, 4 insertions, 4 deletions

diff --git a/gcc/recog.c b/gcc/recog.c
index f8e242b..1f43237 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -3022,10 +3022,7 @@ constrain_operands (int strict, alternative_mask alternatives)
     return 1;
 
   for (c = 0; c < recog_data.n_operands; c++)
-    {
-      constraints[c] = recog_data.constraints[c];
-      matching_operands[c] = -1;
-    }
+    constraints[c] = recog_data.constraints[c];
 
   do
     {
@@ -3046,6 +3043,9 @@ constrain_operands (int strict, alternative_mask alternatives)
 	}
 
       for (opno = 0; opno < recog_data.n_operands; opno++)
+	matching_operands[opno] = -1;
+
+      for (opno = 0; opno < recog_data.n_operands; opno++)
 	{
 	  rtx op = recog_data.operand[opno];
 	  machine_mode mode = GET_MODE (op);