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author | Uros Bizjak <uros@gcc.gnu.org> | 2015-03-20 07:07:30 +0100 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2015-03-20 07:07:30 +0100 |
commit | 21e357f1f2ecbd7b6ab479d8f2836e251681194b (patch) | |
tree | 58246ed0ed5b32420fbc749fa702d585f0674375 /gcc/recog.c | |
parent | 5a59d54e05fff4dc73bedd387d0c73c173e8f3f3 (diff) | |
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re PR rtl-optimization/60851 (ICE: in extract_constrain_insn_cached, at recog.c:2117 with -flive-range-shrinkage -mdispatch-scheduler -march=bdver4)
PR rtl-optimization/60851
* recog.c (constrain_operands): Accept a pseudo register before reload
for LRA enabled targets.
testsuite/ChangeLog:
PR rtl-optimization/60851
* gcc.target/i386/pr60851.c: New test.
From-SVN: r221529
Diffstat (limited to 'gcc/recog.c')
-rw-r--r-- | gcc/recog.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/gcc/recog.c b/gcc/recog.c index 7b5ca8b..a9d3b1f 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -2773,8 +2773,12 @@ constrain_operands (int strict, alternative_mask alternatives) /* Every memory operand can be reloaded to fit. */ && ((strict < 0 && MEM_P (op)) /* Before reload, accept what reload can turn - into mem. */ + into a mem. */ || (strict < 0 && CONSTANT_P (op)) + /* Before reload, accept a pseudo, + since LRA can turn it into a mem. */ + || (strict < 0 && targetm.lra_p () && REG_P (op) + && REGNO (op) >= FIRST_PSEUDO_REGISTER) /* During reload, accept a pseudo */ || (reload_in_progress && REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER))) |