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authorJuzhe-Zhong <juzhe.zhong@rivai.ai>2023-12-09 16:31:53 +0800
committerPan Li <pan2.li@intel.com>2023-12-09 16:37:36 +0800
commit9363d91956931bb28735bed97035b9ec965c850f (patch)
tree02c758665a1cd5d24e2d449ecc60dd05f9b3e515 /gcc/real.h
parent0f3bac474e8f6563a59f814ccf7609ced48b1157 (diff)
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RISC-V: Fix VLS mode movmiaslign bug
PR112932 let me notice there is a bug of current VLS mode misalign pattern. Adapt it same as VLA mode. Commited as it is obvious fix. PR target/112932 gcc/ChangeLog: * config/riscv/vector.md (movmisalign<mode>): Fix VLSmode bugs. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/misalign-1.c: Ditto. * gcc.target/riscv/rvv/autovec/pr112932.c: New test.
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