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| author | Haochen Jiang <haochen.jiang@intel.com> | 2023-08-17 14:24:59 +0800 |
|---|---|---|
| committer | Haochen Jiang <haochen.jiang@intel.com> | 2023-08-17 14:24:59 +0800 |
| commit | 0b20e0f17b47a86cddba68a2e016be0132ae9b0a (patch) | |
| tree | eeba9809516409b8a037ee2bc531e940c4fdd00d /gcc/range.cc | |
| parent | aba10895052fcb2ab3c6d53ad98c855509877555 (diff) | |
| download | gcc-0b20e0f17b47a86cddba68a2e016be0132ae9b0a.zip gcc-0b20e0f17b47a86cddba68a2e016be0132ae9b0a.tar.gz gcc-0b20e0f17b47a86cddba68a2e016be0132ae9b0a.tar.bz2 | |
[Patch 5/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/ChangeLog:
* config/i386/avx512vldqintrin.h: Remove target attribute.
* config/i386/i386-builtin.def (BDESC):
Add OPTION_MASK_ISA2_AVX10_1.
* config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
(VFH_AVX512VLDQ_AVX10_1): Ditto.
(VF1_AVX512VLDQ_AVX10_1): Ditto.
(<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
(vec_pack<floatprefix>_float_<mode>): Change iterator to
VI8_AVX512VLDQ_AVX10_1. Remove target check.
(vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
VF1_AVX512VLDQ_AVX10_1. Remove target check.
(vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
(VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
(avx512vl_vextractf128<mode>): Change iterator to
VI48F_256_DQVL_AVX10_1. Remove target check.
(vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
(vec_extract_hi_<mode>): Ditto.
(avx512vl_vinsert<mode>): Ditto.
(vec_set_lo_<mode><mask_name>): Ditto.
(vec_set_hi_<mode><mask_name>): Ditto.
(avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
(avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
* config/i386/subst.md (mask_avx512dq_condition): Add
TARGET_AVX10_1.
(mask_scalar_merge): Ditto.
Diffstat (limited to 'gcc/range.cc')
0 files changed, 0 insertions, 0 deletions