decl.c, [...]: Remove redundant enum from machine_mode.

gcc/ada/
	* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
	gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
	Remove redundant enum from machine_mode.

gcc/c-family/
	* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
	enum from machine_mode.

gcc/c/
	* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
	machine_mode.

gcc/cp/
	* constexpr.c: Remove redundant enum from machine_mode.

gcc/fortran/
	* trans-types.c, trans-types.h: Remove redundant enum from
	machine_mode.

gcc/go/
	* go-lang.c: Remove redundant enum from machine_mode.

gcc/java/
	* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
	machine_mode.

gcc/lto/
	* lto-lang.c: Remove redundant enum from machine_mode.

gcc/
	* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
	builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
	cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
	config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
	config/aarch64/aarch64.c, config/aarch64/aarch64.h,
	config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
	config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
	config/arc/arc.h, config/arc/predicates.md,
	config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
	config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
	config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
	config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
	config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
	config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
	config/cr16/cr16-protos.h, config/cr16/cr16.c,
	config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
	config/darwin-protos.h, config/darwin.c,
	config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
	config/epiphany/epiphany.md, config/fr30/fr30.c,
	config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
	config/h8300/h8300-protos.h, config/h8300/h8300.c,
	config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
	config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
	config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
	config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
	config/iq2000/iq2000.c, config/iq2000/iq2000.md,
	config/lm32/lm32-protos.h, config/lm32/lm32.c,
	config/m32c/m32c-protos.h, config/m32c/m32c.c,
	config/m32r/m32r-protos.h, config/m32r/m32r.c,
	config/m68k/m68k-protos.h, config/m68k/m68k.c,
	config/mcore/mcore-protos.h, config/mcore/mcore.c,
	config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
	config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
	config/mips/mips-protos.h, config/mips/mips.c,
	config/mmix/mmix-protos.h, config/mmix/mmix.c,
	config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
	config/moxie/moxie.c, config/msp430/msp430-protos.h,
	config/msp430/msp430.c, config/nds32/nds32-cost.c,
	config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
	config/nds32/nds32-protos.h, config/nds32/nds32.c,
	config/nios2/nios2-protos.h, config/nios2/nios2.c,
	config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
	config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
	config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
	config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
	config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
	config/s390/predicates.md, config/s390/s390-protos.h,
	config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
	config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
	config/sh/sh.md, config/sparc/predicates.md,
	config/sparc/sparc-protos.h, config/sparc/sparc.c,
	config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
	config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
	config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
	config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
	config/tilepro/tilepro.c, config/v850/v850-protos.h,
	config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
	config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
	config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
	dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
	doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
	dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
	except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
	fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
	fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
	genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
	graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
	internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
	ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
	libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
	loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
	lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
	lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
	output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
	recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
	regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
	rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
	sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
	simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
	targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
	tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
	tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
	tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
	tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
	tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
	tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
	tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
	tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
	tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
	var-tracking.c, varasm.c: Remove redundant enum from
	machine_mode.
gcc/
	* gengtype.c (main): Treat machine_mode as a scalar typedef.
	* genmodes.c (emit_insn_modes_h): Hide inline functions if
	USED_FOR_TARGET.

From-SVN: r216834

1 files changed, 193 insertions, 193 deletions

diff --git a/gcc/optabs.c b/gcc/optabs.c
index 9452f99..a9a546e 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -67,8 +67,8 @@ struct target_libfuncs *this_target_libfuncs = &default_target_libfuncs;
   (this_target_libfuncs->x_libfunc_hash)
 
 static void prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *,
-				   enum machine_mode *);
-static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
+				   machine_mode *);
+static rtx expand_unop_direct (machine_mode, optab, rtx, rtx, int);
 static void emit_libcall_block_1 (rtx_insn *, rtx, rtx, rtx, bool);
 
 /* Debug facility for use in GDB.  */
@@ -101,8 +101,8 @@ libfunc_hasher::equal (libfunc_entry *e1, libfunc_entry *e2)
    from MODE2 to MODE1.  Trigger lazy initialization if needed, return NULL
    if no libfunc is available.  */
 rtx
-convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
-		       enum machine_mode mode2)
+convert_optab_libfunc (convert_optab optab, machine_mode mode1,
+		       machine_mode mode2)
 {
   struct libfunc_entry e;
   struct libfunc_entry **slot;
@@ -137,7 +137,7 @@ convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
    Trigger lazy initialization if needed, return NULL if no libfunc is
    available.  */
 rtx
-optab_libfunc (optab optab, enum machine_mode mode)
+optab_libfunc (optab optab, machine_mode mode)
 {
   struct libfunc_entry e;
   struct libfunc_entry **slot;
@@ -281,12 +281,12 @@ add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0, rtx op
    for a widening operation would be.  In most cases this would be OP0, but if
    that's a constant it'll be VOIDmode, which isn't useful.  */
 
-static enum machine_mode
-widened_mode (enum machine_mode to_mode, rtx op0, rtx op1)
+static machine_mode
+widened_mode (machine_mode to_mode, rtx op0, rtx op1)
 {
-  enum machine_mode m0 = GET_MODE (op0);
-  enum machine_mode m1 = GET_MODE (op1);
-  enum machine_mode result;
+  machine_mode m0 = GET_MODE (op0);
+  machine_mode m1 = GET_MODE (op1);
+  machine_mode result;
 
   if (m0 == VOIDmode && m1 == VOIDmode)
     return to_mode;
@@ -305,8 +305,8 @@ widened_mode (enum machine_mode to_mode, rtx op0, rtx op1)
    TO_MODE and a FROM_MODE.  */
 
 enum insn_code
-widening_optab_handler (optab op, enum machine_mode to_mode,
-			enum machine_mode from_mode)
+widening_optab_handler (optab op, machine_mode to_mode,
+			machine_mode from_mode)
 {
   unsigned scode = (op << 16) | to_mode;
   if (to_mode != from_mode && from_mode != VOIDmode)
@@ -327,10 +327,10 @@ widening_optab_handler (optab op, enum machine_mode to_mode,
    non-widening optabs also.  */
 
 enum insn_code
-find_widening_optab_handler_and_mode (optab op, enum machine_mode to_mode,
-				      enum machine_mode from_mode,
+find_widening_optab_handler_and_mode (optab op, machine_mode to_mode,
+				      machine_mode from_mode,
 				      int permit_non_widening,
-				      enum machine_mode *found_mode)
+				      machine_mode *found_mode)
 {
   for (; (permit_non_widening || from_mode != to_mode)
 	 && GET_MODE_SIZE (from_mode) <= GET_MODE_SIZE (to_mode)
@@ -358,7 +358,7 @@ find_widening_optab_handler_and_mode (optab op, enum machine_mode to_mode,
    of logical operations, but not right shifts.  */
 
 static rtx
-widen_operand (rtx op, enum machine_mode mode, enum machine_mode oldmode,
+widen_operand (rtx op, machine_mode mode, machine_mode oldmode,
 	       int unsignedp, int no_extend)
 {
   rtx result;
@@ -657,7 +657,7 @@ expand_widen_pattern_expr (sepops ops, rtx op0, rtx op1, rtx wide_op,
 {
   struct expand_operand eops[4];
   tree oprnd0, oprnd1, oprnd2;
-  enum machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
+  machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
   optab widen_pattern_optab;
   enum insn_code icode;
   int nops = TREE_CODE_LENGTH (ops->code);
@@ -716,7 +716,7 @@ expand_widen_pattern_expr (sepops ops, rtx op0, rtx op1, rtx wide_op,
    this may or may not be TARGET.  */
 
 rtx
-expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
+expand_ternary_op (machine_mode mode, optab ternary_optab, rtx op0,
 		   rtx op1, rtx op2, rtx target, int unsignedp)
 {
   struct expand_operand ops[4];
@@ -738,7 +738,7 @@ expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
    otherwise the same as for expand_binop.  */
 
 rtx
-simplify_expand_binop (enum machine_mode mode, optab binoptab,
+simplify_expand_binop (machine_mode mode, optab binoptab,
 		       rtx op0, rtx op1, rtx target, int unsignedp,
 		       enum optab_methods methods)
 {
@@ -757,7 +757,7 @@ simplify_expand_binop (enum machine_mode mode, optab binoptab,
    Return true if the expansion succeeded.  */
 
 bool
-force_expand_binop (enum machine_mode mode, optab binoptab,
+force_expand_binop (machine_mode mode, optab binoptab,
 		    rtx op0, rtx op1, rtx target, int unsignedp,
 		    enum optab_methods methods)
 {
@@ -778,7 +778,7 @@ expand_vec_shift_expr (sepops ops, rtx target)
   struct expand_operand eops[3];
   enum insn_code icode;
   rtx rtx_op1, rtx_op2;
-  enum machine_mode mode = TYPE_MODE (ops->type);
+  machine_mode mode = TYPE_MODE (ops->type);
   tree vec_oprnd = ops->op0;
   tree shift_oprnd = ops->op1;
 
@@ -803,7 +803,7 @@ expand_vec_shift_expr (sepops ops, rtx target)
    then the return value will be a constant.  */
 
 static rtx
-expand_vector_broadcast (enum machine_mode vmode, rtx op)
+expand_vector_broadcast (machine_mode vmode, rtx op)
 {
   enum insn_code icode;
   rtvec vec;
@@ -869,7 +869,7 @@ expand_superword_shift (optab binoptab, rtx outof_input, rtx superword_op1,
    value are the same as for the parent routine.  */
 
 static bool
-expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
+expand_subword_shift (machine_mode op1_mode, optab binoptab,
 		      rtx outof_input, rtx into_input, rtx op1,
 		      rtx outof_target, rtx into_target,
 		      int unsignedp, enum optab_methods methods,
@@ -953,7 +953,7 @@ expand_subword_shift (enum machine_mode op1_mode, optab binoptab,
    arguments are the same as the parent routine.  */
 
 static bool
-expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
+expand_doubleword_shift_condmove (machine_mode op1_mode, optab binoptab,
 				  enum rtx_code cmp_code, rtx cmp1, rtx cmp2,
 				  rtx outof_input, rtx into_input,
 				  rtx subword_op1, rtx superword_op1,
@@ -1037,7 +1037,7 @@ expand_doubleword_shift_condmove (enum machine_mode op1_mode, optab binoptab,
    Return true if the shift could be successfully synthesized.  */
 
 static bool
-expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
+expand_doubleword_shift (machine_mode op1_mode, optab binoptab,
 			 rtx outof_input, rtx into_input, rtx op1,
 			 rtx outof_target, rtx into_target,
 			 int unsignedp, enum optab_methods methods,
@@ -1211,7 +1211,7 @@ expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
       the 0 or -1.  */
 
 static rtx
-expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
+expand_doubleword_mult (machine_mode mode, rtx op0, rtx op1, rtx target,
 		       bool umulp, enum optab_methods methods)
 {
   int low = (WORDS_BIG_ENDIAN ? 1 : 0);
@@ -1319,7 +1319,7 @@ expand_doubleword_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
    the operation to perform, not an optab pointer.  All other
    arguments are the same.  */
 rtx
-expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
+expand_simple_binop (machine_mode mode, enum rtx_code code, rtx op0,
 		     rtx op1, rtx target, int unsignedp,
 		     enum optab_methods methods)
 {
@@ -1391,7 +1391,7 @@ commutative_optab_p (optab binoptab)
    register.  Return X otherwise.  UNSIGNEDP says whether X is unsigned.  */
 
 static rtx
-avoid_expensive_constant (enum machine_mode mode, optab binoptab,
+avoid_expensive_constant (machine_mode mode, optab binoptab,
 			  int opn, rtx x, bool unsignedp)
 {
   bool speed = optimize_insn_for_speed_p ();
@@ -1419,17 +1419,17 @@ avoid_expensive_constant (enum machine_mode mode, optab binoptab,
    is an insn that directly implements the indicated operation.
    Returns null if this is not possible.  */
 static rtx
-expand_binop_directly (enum machine_mode mode, optab binoptab,
+expand_binop_directly (machine_mode mode, optab binoptab,
 		       rtx op0, rtx op1,
 		       rtx target, int unsignedp, enum optab_methods methods,
 		       rtx_insn *last)
 {
-  enum machine_mode from_mode = widened_mode (mode, op0, op1);
+  machine_mode from_mode = widened_mode (mode, op0, op1);
   enum insn_code icode = find_widening_optab_handler (binoptab, mode,
 						      from_mode, 1);
-  enum machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
-  enum machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
-  enum machine_mode mode0, mode1, tmp_mode;
+  machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
+  machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
+  machine_mode mode0, mode1, tmp_mode;
   struct expand_operand ops[3];
   bool commutative_p;
   rtx pat;
@@ -1544,14 +1544,14 @@ expand_binop_directly (enum machine_mode mode, optab binoptab,
    this may or may not be TARGET.  */
 
 rtx
-expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
+expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
 	      rtx target, int unsignedp, enum optab_methods methods)
 {
   enum optab_methods next_methods
     = (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
        ? OPTAB_WIDEN : methods);
   enum mode_class mclass;
-  enum machine_mode wider_mode;
+  machine_mode wider_mode;
   rtx libfunc;
   rtx temp;
   rtx_insn *entry_last = get_last_insn ();
@@ -1801,7 +1801,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
       && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
     {
       unsigned HOST_WIDE_INT shift_mask, double_shift_mask;
-      enum machine_mode op1_mode;
+      machine_mode op1_mode;
 
       double_shift_mask = targetm.shift_truncation_mask (mode);
       shift_mask = targetm.shift_truncation_mask (word_mode);
@@ -2159,7 +2159,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
     {
       rtx_insn *insns;
       rtx op1x = op1;
-      enum machine_mode op1_mode = mode;
+      machine_mode op1_mode = mode;
       rtx value;
 
       start_sequence ();
@@ -2279,7 +2279,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
    of an unsigned wider operation, since the result would be the same.  */
 
 rtx
-sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab,
+sign_expand_binop (machine_mode mode, optab uoptab, optab soptab,
 		   rtx op0, rtx op1, rtx target, int unsignedp,
 		   enum optab_methods methods)
 {
@@ -2342,9 +2342,9 @@ int
 expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
 		    int unsignedp)
 {
-  enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
+  machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
   enum mode_class mclass;
-  enum machine_mode wider_mode;
+  machine_mode wider_mode;
   rtx_insn *entry_last = get_last_insn ();
   rtx_insn *last;
 
@@ -2416,9 +2416,9 @@ int
 expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
 		     int unsignedp)
 {
-  enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
+  machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
   enum mode_class mclass;
-  enum machine_mode wider_mode;
+  machine_mode wider_mode;
   rtx_insn *entry_last = get_last_insn ();
   rtx_insn *last;
 
@@ -2436,8 +2436,8 @@ expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
     {
       struct expand_operand ops[4];
       enum insn_code icode = optab_handler (binoptab, mode);
-      enum machine_mode mode0 = insn_data[icode].operand[1].mode;
-      enum machine_mode mode1 = insn_data[icode].operand[2].mode;
+      machine_mode mode0 = insn_data[icode].operand[1].mode;
+      machine_mode mode1 = insn_data[icode].operand[2].mode;
       rtx xop0 = op0, xop1 = op1;
 
       /* If we are optimizing, force expensive constants into a register.  */
@@ -2498,8 +2498,8 @@ bool
 expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
 			     rtx targ0, rtx targ1, enum rtx_code code)
 {
-  enum machine_mode mode;
-  enum machine_mode libval_mode;
+  machine_mode mode;
+  machine_mode libval_mode;
   rtx libval;
   rtx_insn *insns;
   rtx libfunc;
@@ -2538,7 +2538,7 @@ expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
    the operation to perform, not an optab pointer.  All other
    arguments are the same.  */
 rtx
-expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
+expand_simple_unop (machine_mode mode, enum rtx_code code, rtx op0,
 		    rtx target, int unsignedp)
 {
   optab unop = code_to_optab (code);
@@ -2555,12 +2555,12 @@ expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
    A similar operation can be used for clrsb.  UNOPTAB says which operation
    we are trying to expand.  */
 static rtx
-widen_leading (enum machine_mode mode, rtx op0, rtx target, optab unoptab)
+widen_leading (machine_mode mode, rtx op0, rtx target, optab unoptab)
 {
   enum mode_class mclass = GET_MODE_CLASS (mode);
   if (CLASS_HAS_WIDER_MODES_P (mclass))
     {
-      enum machine_mode wider_mode;
+      machine_mode wider_mode;
       for (wider_mode = GET_MODE_WIDER_MODE (mode);
 	   wider_mode != VOIDmode;
 	   wider_mode = GET_MODE_WIDER_MODE (wider_mode))
@@ -2598,7 +2598,7 @@ widen_leading (enum machine_mode mode, rtx op0, rtx target, optab unoptab)
 /* Try calculating clz of a double-word quantity as two clz's of word-sized
    quantities, choosing which based on whether the high word is nonzero.  */
 static rtx
-expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
+expand_doubleword_clz (machine_mode mode, rtx op0, rtx target)
 {
   rtx xop0 = force_reg (mode, op0);
   rtx subhi = gen_highpart (word_mode, xop0);
@@ -2671,10 +2671,10 @@ expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
    as
 	(lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))).  */
 static rtx
-widen_bswap (enum machine_mode mode, rtx op0, rtx target)
+widen_bswap (machine_mode mode, rtx op0, rtx target)
 {
   enum mode_class mclass = GET_MODE_CLASS (mode);
-  enum machine_mode wider_mode;
+  machine_mode wider_mode;
   rtx x;
   rtx_insn *last;
 
@@ -2717,7 +2717,7 @@ widen_bswap (enum machine_mode mode, rtx op0, rtx target)
 /* Try calculating bswap as two bswaps of two word-sized operands.  */
 
 static rtx
-expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
+expand_doubleword_bswap (machine_mode mode, rtx op, rtx target)
 {
   rtx t0, t1;
 
@@ -2739,12 +2739,12 @@ expand_doubleword_bswap (enum machine_mode mode, rtx op, rtx target)
 /* Try calculating (parity x) as (and (popcount x) 1), where
    popcount can also be done in a wider mode.  */
 static rtx
-expand_parity (enum machine_mode mode, rtx op0, rtx target)
+expand_parity (machine_mode mode, rtx op0, rtx target)
 {
   enum mode_class mclass = GET_MODE_CLASS (mode);
   if (CLASS_HAS_WIDER_MODES_P (mclass))
     {
-      enum machine_mode wider_mode;
+      machine_mode wider_mode;
       for (wider_mode = mode; wider_mode != VOIDmode;
 	   wider_mode = GET_MODE_WIDER_MODE (wider_mode))
 	{
@@ -2786,7 +2786,7 @@ expand_parity (enum machine_mode mode, rtx op0, rtx target)
    less convenient for expand_ffs anyway.  */
 
 static rtx
-expand_ctz (enum machine_mode mode, rtx op0, rtx target)
+expand_ctz (machine_mode mode, rtx op0, rtx target)
 {
   rtx_insn *seq;
   rtx temp;
@@ -2829,7 +2829,7 @@ expand_ctz (enum machine_mode mode, rtx op0, rtx target)
    may have an undefined value in that case.  If they do not give us a
    convenient value, we have to generate a test and branch.  */
 static rtx
-expand_ffs (enum machine_mode mode, rtx op0, rtx target)
+expand_ffs (machine_mode mode, rtx op0, rtx target)
 {
   HOST_WIDE_INT val = 0;
   bool defined_at_zero = false;
@@ -2909,8 +2909,8 @@ expand_ffs (enum machine_mode mode, rtx op0, rtx target)
    register will work around the situation.  */
 
 static rtx
-lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
-			   enum machine_mode imode)
+lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
+			   machine_mode imode)
 {
   rtx ret;
   ret = lowpart_subreg (omode, val, imode);
@@ -2927,12 +2927,12 @@ lowpart_subreg_maybe_copy (enum machine_mode omode, rtx val,
    logical operation on the sign bit.  */
 
 static rtx
-expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
+expand_absneg_bit (enum rtx_code code, machine_mode mode,
 		   rtx op0, rtx target)
 {
   const struct real_format *fmt;
   int bitpos, word, nwords, i;
-  enum machine_mode imode;
+  machine_mode imode;
   rtx temp;
   rtx_insn *insns;
 
@@ -3024,7 +3024,7 @@ expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
 /* As expand_unop, but will fail rather than attempt the operation in a
    different mode or with a libcall.  */
 static rtx
-expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
+expand_unop_direct (machine_mode mode, optab unoptab, rtx op0, rtx target,
 	     int unsignedp)
 {
   if (optab_handler (unoptab, mode) != CODE_FOR_nothing)
@@ -3068,11 +3068,11 @@ expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
    this may or may not be TARGET.  */
 
 rtx
-expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
+expand_unop (machine_mode mode, optab unoptab, rtx op0, rtx target,
 	     int unsignedp)
 {
   enum mode_class mclass = GET_MODE_CLASS (mode);
-  enum machine_mode wider_mode;
+  machine_mode wider_mode;
   rtx temp;
   rtx libfunc;
 
@@ -3296,7 +3296,7 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
       rtx_insn *insns;
       rtx value;
       rtx eq_value;
-      enum machine_mode outmode = mode;
+      machine_mode outmode = mode;
 
       /* All of these functions return small values.  Thus we choose to
 	 have them return something that isn't a double-word.  */
@@ -3423,7 +3423,7 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
  */
 
 rtx
-expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
+expand_abs_nojump (machine_mode mode, rtx op0, rtx target,
 		   int result_unsignedp)
 {
   rtx temp;
@@ -3490,7 +3490,7 @@ expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
 }
 
 rtx
-expand_abs (enum machine_mode mode, rtx op0, rtx target,
+expand_abs (machine_mode mode, rtx op0, rtx target,
 	    int result_unsignedp, int safe)
 {
   rtx temp;
@@ -3544,7 +3544,7 @@ expand_abs (enum machine_mode mode, rtx op0, rtx target,
    different but can be deduced from MODE.  */
 
 rtx
-expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target)
+expand_one_cmpl_abs_nojump (machine_mode mode, rtx op0, rtx target)
 {
   rtx temp;
 
@@ -3595,10 +3595,10 @@ expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target)
    and not playing with subregs so much, will help the register allocator.  */
 
 static rtx
-expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
+expand_copysign_absneg (machine_mode mode, rtx op0, rtx op1, rtx target,
 		        int bitpos, bool op0_is_abs)
 {
-  enum machine_mode imode;
+  machine_mode imode;
   enum insn_code icode;
   rtx sign;
   rtx_code_label *label;
@@ -3679,10 +3679,10 @@ expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
    is true if op0 is known to have its sign bit clear.  */
 
 static rtx
-expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
+expand_copysign_bit (machine_mode mode, rtx op0, rtx op1, rtx target,
 		     int bitpos, bool op0_is_abs)
 {
-  enum machine_mode imode;
+  machine_mode imode;
   int word, nwords, i;
   rtx temp;
   rtx_insn *insns;
@@ -3777,7 +3777,7 @@ expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
 rtx
 expand_copysign (rtx op0, rtx op1, rtx target)
 {
-  enum machine_mode mode = GET_MODE (op0);
+  machine_mode mode = GET_MODE (op0);
   const struct real_format *fmt;
   bool op0_is_abs;
   rtx temp;
@@ -4033,7 +4033,7 @@ emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
    required to implement all (or any) of the unordered bcc operations.  */
 
 int
-can_compare_p (enum rtx_code code, enum machine_mode mode,
+can_compare_p (enum rtx_code code, machine_mode mode,
 	       enum can_compare_purpose purpose)
 {
   rtx test;
@@ -4082,11 +4082,11 @@ can_compare_p (enum rtx_code code, enum machine_mode mode,
 static void
 prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
 		  int unsignedp, enum optab_methods methods,
-		  rtx *ptest, enum machine_mode *pmode)
+		  rtx *ptest, machine_mode *pmode)
 {
-  enum machine_mode mode = *pmode;
+  machine_mode mode = *pmode;
   rtx libfunc, test;
-  enum machine_mode cmp_mode;
+  machine_mode cmp_mode;
   enum mode_class mclass;
 
   /* The other methods are not needed.  */
@@ -4121,7 +4121,7 @@ prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
 
   if (mode == BLKmode)
     {
-      enum machine_mode result_mode;
+      machine_mode result_mode;
       enum insn_code cmp_code;
       tree length_type;
       rtx libfunc;
@@ -4240,7 +4240,7 @@ prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
   if (!SCALAR_FLOAT_MODE_P (mode))
     {
       rtx result;
-      enum machine_mode ret_mode;
+      machine_mode ret_mode;
 
       /* Handle a libcall just for the mode we are using.  */
       libfunc = optab_libfunc (cmp_optab, mode);
@@ -4299,8 +4299,8 @@ prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
    that it is accepted by the operand predicate.  Return the new value.  */
 
 rtx
-prepare_operand (enum insn_code icode, rtx x, int opnum, enum machine_mode mode,
-		 enum machine_mode wider_mode, int unsignedp)
+prepare_operand (enum insn_code icode, rtx x, int opnum, machine_mode mode,
+		 machine_mode wider_mode, int unsignedp)
 {
   if (mode != wider_mode)
     x = convert_modes (wider_mode, mode, x, unsignedp);
@@ -4319,9 +4319,9 @@ prepare_operand (enum insn_code icode, rtx x, int opnum, enum machine_mode mode,
    we can do the branch.  */
 
 static void
-emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label, int prob)
+emit_cmp_and_jump_insn_1 (rtx test, machine_mode mode, rtx label, int prob)
 {
-  enum machine_mode optab_mode;
+  machine_mode optab_mode;
   enum mode_class mclass;
   enum insn_code icode;
   rtx_insn *insn;
@@ -4364,7 +4364,7 @@ emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label, int prob)
 
 void
 emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
-			 enum machine_mode mode, int unsignedp, rtx label,
+			 machine_mode mode, int unsignedp, rtx label,
                          int prob)
 {
   rtx op0 = x, op1 = y;
@@ -4398,12 +4398,12 @@ emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
 
 static void
 prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison,
-		       rtx *ptest, enum machine_mode *pmode)
+		       rtx *ptest, machine_mode *pmode)
 {
   enum rtx_code swapped = swap_condition (comparison);
   enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
-  enum machine_mode orig_mode = GET_MODE (x);
-  enum machine_mode mode, cmp_mode;
+  machine_mode orig_mode = GET_MODE (x);
+  machine_mode mode, cmp_mode;
   rtx true_rtx, false_rtx;
   rtx value, target, equiv;
   rtx_insn *insns;
@@ -4557,8 +4557,8 @@ emit_indirect_jump (rtx loc)
 
 rtx
 emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
-		       enum machine_mode cmode, rtx op2, rtx op3,
-		       enum machine_mode mode, int unsignedp)
+		       machine_mode cmode, rtx op2, rtx op3,
+		       machine_mode mode, int unsignedp)
 {
   rtx tem, comparison;
   rtx_insn *last;
@@ -4653,7 +4653,7 @@ emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
    comparisons, and vice versa.  How do we handle them?  */
 
 int
-can_conditionally_move_p (enum machine_mode mode)
+can_conditionally_move_p (machine_mode mode)
 {
   if (direct_optab_handler (movcc_optab, mode) != CODE_FOR_nothing)
     return 1;
@@ -4679,8 +4679,8 @@ can_conditionally_move_p (enum machine_mode mode)
 
 rtx
 emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
-		      enum machine_mode cmode, rtx op2, rtx op3,
-		      enum machine_mode mode, int unsignedp)
+		      machine_mode cmode, rtx op2, rtx op3,
+		      machine_mode mode, int unsignedp)
 {
   rtx tem, comparison;
   rtx_insn *last;
@@ -4915,7 +4915,7 @@ gen_move_insn (rtx x, rtx y)
    no such operation exists, CODE_FOR_nothing will be returned.  */
 
 enum insn_code
-can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
+can_extend_p (machine_mode to_mode, machine_mode from_mode,
 	      int unsignedp)
 {
   convert_optab tab;
@@ -4932,8 +4932,8 @@ can_extend_p (enum machine_mode to_mode, enum machine_mode from_mode,
    into X (with mode MTO).  Do zero-extension if UNSIGNEDP is nonzero.  */
 
 rtx
-gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
-		 enum machine_mode mfrom, int unsignedp)
+gen_extend_insn (rtx x, rtx y, machine_mode mto,
+		 machine_mode mfrom, int unsignedp)
 {
   enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
   return GEN_FCN (icode) (x, y);
@@ -4949,7 +4949,7 @@ gen_extend_insn (rtx x, rtx y, enum machine_mode mto,
    an explicit FTRUNC insn before the fix insn; otherwise 0.  */
 
 static enum insn_code
-can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
+can_fix_p (machine_mode fixmode, machine_mode fltmode,
 	   int unsignedp, int *truncp_ptr)
 {
   convert_optab tab;
@@ -4980,7 +4980,7 @@ can_fix_p (enum machine_mode fixmode, enum machine_mode fltmode,
 }
 
 enum insn_code
-can_float_p (enum machine_mode fltmode, enum machine_mode fixmode,
+can_float_p (machine_mode fltmode, machine_mode fixmode,
 	     int unsignedp)
 {
   convert_optab tab;
@@ -5013,7 +5013,7 @@ supportable_convert_operation (enum tree_code code,
                                     tree vectype_out, tree vectype_in,
                                     tree *decl, enum tree_code *code1)
 {
-  enum machine_mode m1,m2;
+  machine_mode m1,m2;
   int truncp;
 
   m1 = TYPE_MODE (vectype_out);
@@ -5054,7 +5054,7 @@ expand_float (rtx to, rtx from, int unsignedp)
 {
   enum insn_code icode;
   rtx target = to;
-  enum machine_mode fmode, imode;
+  machine_mode fmode, imode;
   bool can_do_signed = false;
 
   /* Crash now, because we won't be able to decide which mode to use.  */
@@ -5255,7 +5255,7 @@ expand_fix (rtx to, rtx from, int unsignedp)
 {
   enum insn_code icode;
   rtx target = to;
-  enum machine_mode fmode, imode;
+  machine_mode fmode, imode;
   int must_trunc = 0;
 
   /* We first try to find a pair of modes, one real and one integer, at
@@ -5437,8 +5437,8 @@ expand_fix (rtx to, rtx from, int unsignedp)
 void
 expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
 {
-  enum machine_mode to_mode = GET_MODE (to);
-  enum machine_mode from_mode = GET_MODE (from);
+  machine_mode to_mode = GET_MODE (to);
+  machine_mode from_mode = GET_MODE (from);
   convert_optab tab;
   enum rtx_code this_code;
   enum insn_code code;
@@ -5491,7 +5491,7 @@ expand_sfix_optab (rtx to, rtx from, convert_optab tab)
 {
   enum insn_code icode;
   rtx target = to;
-  enum machine_mode fmode, imode;
+  machine_mode fmode, imode;
 
   /* We first try to find a pair of modes, one real and one integer, at
      least as wide as FROM and TO, respectively, in which we can open-code
@@ -5530,7 +5530,7 @@ expand_sfix_optab (rtx to, rtx from, convert_optab tab)
 /* Report whether we have an instruction to perform the operation
    specified by CODE on operands of mode MODE.  */
 int
-have_insn_for (enum rtx_code code, enum machine_mode mode)
+have_insn_for (enum rtx_code code, machine_mode mode)
 {
   return (code_to_optab (code)
 	  && (optab_handler (code_to_optab (code), mode)
@@ -5553,7 +5553,7 @@ have_insn_for (enum rtx_code code, enum machine_mode mode)
 
 static void
 gen_libfunc (optab optable, const char *opname, int suffix,
-	     enum machine_mode mode)
+	     machine_mode mode)
 {
   unsigned opname_len = strlen (opname);
   const char *mname = GET_MODE_NAME (mode);
@@ -5589,7 +5589,7 @@ gen_libfunc (optab optable, const char *opname, int suffix,
 
 void
 gen_int_libfunc (optab optable, const char *opname, char suffix,
-		 enum machine_mode mode)
+		 machine_mode mode)
 {
   int maxsize = 2 * BITS_PER_WORD;
   int minsize = BITS_PER_WORD;
@@ -5612,7 +5612,7 @@ gen_int_libfunc (optab optable, const char *opname, char suffix,
 
 void
 gen_fp_libfunc (optab optable, const char *opname, char suffix,
-		enum machine_mode mode)
+		machine_mode mode)
 {
   char *dec_opname;
 
@@ -5633,7 +5633,7 @@ gen_fp_libfunc (optab optable, const char *opname, char suffix,
 
 void
 gen_fixed_libfunc (optab optable, const char *opname, char suffix,
-		   enum machine_mode mode)
+		   machine_mode mode)
 {
   if (!ALL_FIXED_POINT_MODE_P (mode))
     return;
@@ -5645,7 +5645,7 @@ gen_fixed_libfunc (optab optable, const char *opname, char suffix,
 
 void
 gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
-			  enum machine_mode mode)
+			  machine_mode mode)
 {
   if (!SIGNED_FIXED_POINT_MODE_P (mode))
     return;
@@ -5657,7 +5657,7 @@ gen_signed_fixed_libfunc (optab optable, const char *opname, char suffix,
 
 void
 gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
-			    enum machine_mode mode)
+			    machine_mode mode)
 {
   if (!UNSIGNED_FIXED_POINT_MODE_P (mode))
     return;
@@ -5668,7 +5668,7 @@ gen_unsigned_fixed_libfunc (optab optable, const char *opname, char suffix,
 
 void
 gen_int_fp_libfunc (optab optable, const char *name, char suffix,
-		    enum machine_mode mode)
+		    machine_mode mode)
 {
   if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
     gen_fp_libfunc (optable, name, suffix, mode);
@@ -5681,7 +5681,7 @@ gen_int_fp_libfunc (optab optable, const char *name, char suffix,
 
 void
 gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
-		     enum machine_mode mode)
+		     machine_mode mode)
 {
   if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
     gen_fp_libfunc (optable, name, suffix, mode);
@@ -5701,7 +5701,7 @@ gen_intv_fp_libfunc (optab optable, const char *name, char suffix,
 
 void
 gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
-			  enum machine_mode mode)
+			  machine_mode mode)
 {
   if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
     gen_fp_libfunc (optable, name, suffix, mode);
@@ -5716,7 +5716,7 @@ gen_int_fp_fixed_libfunc (optab optable, const char *name, char suffix,
 
 void
 gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
-				 enum machine_mode mode)
+				 machine_mode mode)
 {
   if (DECIMAL_FLOAT_MODE_P (mode) || GET_MODE_CLASS (mode) == MODE_FLOAT)
     gen_fp_libfunc (optable, name, suffix, mode);
@@ -5731,7 +5731,7 @@ gen_int_fp_signed_fixed_libfunc (optab optable, const char *name, char suffix,
 
 void
 gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
-		       enum machine_mode mode)
+		       machine_mode mode)
 {
   if (INTEGRAL_MODE_P (mode))
     gen_int_libfunc (optable, name, suffix, mode);
@@ -5744,7 +5744,7 @@ gen_int_fixed_libfunc (optab optable, const char *name, char suffix,
 
 void
 gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
-			      enum machine_mode mode)
+			      machine_mode mode)
 {
   if (INTEGRAL_MODE_P (mode))
     gen_int_libfunc (optable, name, suffix, mode);
@@ -5757,7 +5757,7 @@ gen_int_signed_fixed_libfunc (optab optable, const char *name, char suffix,
 
 void
 gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
-				enum machine_mode mode)
+				machine_mode mode)
 {
   if (INTEGRAL_MODE_P (mode))
     gen_int_libfunc (optable, name, suffix, mode);
@@ -5774,8 +5774,8 @@ gen_int_unsigned_fixed_libfunc (optab optable, const char *name, char suffix,
 void
 gen_interclass_conv_libfunc (convert_optab tab,
 			     const char *opname,
-			     enum machine_mode tmode,
-			     enum machine_mode fmode)
+			     machine_mode tmode,
+			     machine_mode fmode)
 {
   size_t opname_len = strlen (opname);
   size_t mname_len = 0;
@@ -5846,8 +5846,8 @@ gen_interclass_conv_libfunc (convert_optab tab,
 void
 gen_int_to_fp_conv_libfunc (convert_optab tab,
 			    const char *opname,
-			    enum machine_mode tmode,
-			    enum machine_mode fmode)
+			    machine_mode tmode,
+			    machine_mode fmode)
 {
   if (GET_MODE_CLASS (fmode) != MODE_INT)
     return;
@@ -5862,8 +5862,8 @@ gen_int_to_fp_conv_libfunc (convert_optab tab,
 void
 gen_ufloat_conv_libfunc (convert_optab tab,
 			 const char *opname ATTRIBUTE_UNUSED,
-			 enum machine_mode tmode,
-			 enum machine_mode fmode)
+			 machine_mode tmode,
+			 machine_mode fmode)
 {
   if (DECIMAL_FLOAT_MODE_P (tmode))
     gen_int_to_fp_conv_libfunc (tab, "floatuns", tmode, fmode);
@@ -5877,8 +5877,8 @@ gen_ufloat_conv_libfunc (convert_optab tab,
 void
 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
 			               const char *opname,
-			               enum machine_mode tmode,
-			               enum machine_mode fmode)
+			               machine_mode tmode,
+			               machine_mode fmode)
 {
   if (GET_MODE_CLASS (fmode) != MODE_INT)
     return;
@@ -5893,8 +5893,8 @@ gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab,
 void
 gen_fp_to_int_conv_libfunc (convert_optab tab,
 			    const char *opname,
-			    enum machine_mode tmode,
-			    enum machine_mode fmode)
+			    machine_mode tmode,
+			    machine_mode fmode)
 {
   if (GET_MODE_CLASS (fmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (fmode))
     return;
@@ -5909,7 +5909,7 @@ gen_fp_to_int_conv_libfunc (convert_optab tab,
 
 void
 gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
-			     enum machine_mode tmode, enum machine_mode fmode)
+			     machine_mode tmode, machine_mode fmode)
 {
   size_t opname_len = strlen (opname);
   size_t mname_len = 0;
@@ -5980,8 +5980,8 @@ gen_intraclass_conv_libfunc (convert_optab tab, const char *opname,
 void
 gen_trunc_conv_libfunc (convert_optab tab,
 			 const char *opname,
-			 enum machine_mode tmode,
-			 enum machine_mode fmode)
+			 machine_mode tmode,
+			 machine_mode fmode)
 {
   if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
     return;
@@ -6009,8 +6009,8 @@ gen_trunc_conv_libfunc (convert_optab tab,
 void
 gen_extend_conv_libfunc (convert_optab tab,
 			 const char *opname ATTRIBUTE_UNUSED,
-			 enum machine_mode tmode,
-			 enum machine_mode fmode)
+			 machine_mode tmode,
+			 machine_mode fmode)
 {
   if (GET_MODE_CLASS (tmode) != MODE_FLOAT && !DECIMAL_FLOAT_MODE_P (tmode))
     return;
@@ -6038,8 +6038,8 @@ gen_extend_conv_libfunc (convert_optab tab,
 void
 gen_fract_conv_libfunc (convert_optab tab,
 			const char *opname,
-			enum machine_mode tmode,
-			enum machine_mode fmode)
+			machine_mode tmode,
+			machine_mode fmode)
 {
   if (tmode == fmode)
     return;
@@ -6057,8 +6057,8 @@ gen_fract_conv_libfunc (convert_optab tab,
 void
 gen_fractuns_conv_libfunc (convert_optab tab,
 			   const char *opname,
-			   enum machine_mode tmode,
-			   enum machine_mode fmode)
+			   machine_mode tmode,
+			   machine_mode fmode)
 {
   if (tmode == fmode)
     return;
@@ -6078,8 +6078,8 @@ gen_fractuns_conv_libfunc (convert_optab tab,
 void
 gen_satfract_conv_libfunc (convert_optab tab,
 			   const char *opname,
-			   enum machine_mode tmode,
-			   enum machine_mode fmode)
+			   machine_mode tmode,
+			   machine_mode fmode)
 {
   if (tmode == fmode)
     return;
@@ -6098,8 +6098,8 @@ gen_satfract_conv_libfunc (convert_optab tab,
 void
 gen_satfractuns_conv_libfunc (convert_optab tab,
 			      const char *opname,
-			      enum machine_mode tmode,
-			      enum machine_mode fmode)
+			      machine_mode tmode,
+			      machine_mode fmode)
 {
   if (tmode == fmode)
     return;
@@ -6196,7 +6196,7 @@ set_user_assembler_libfunc (const char *name, const char *asmspec)
 /* Call this to reset the function entry for one optab (OPTABLE) in mode
    MODE to NAME, which should be either 0 or a string constant.  */
 void
-set_optab_libfunc (optab op, enum machine_mode mode, const char *name)
+set_optab_libfunc (optab op, machine_mode mode, const char *name)
 {
   rtx val;
   struct libfunc_entry e;
@@ -6223,8 +6223,8 @@ set_optab_libfunc (optab op, enum machine_mode mode, const char *name)
    (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
    either 0 or a string constant.  */
 void
-set_conv_libfunc (convert_optab optab, enum machine_mode tmode,
-		  enum machine_mode fmode, const char *name)
+set_conv_libfunc (convert_optab optab, machine_mode tmode,
+		  machine_mode fmode, const char *name)
 {
   rtx val;
   struct libfunc_entry e;
@@ -6354,7 +6354,7 @@ init_tree_optimization_optabs (tree optnode)
 static void
 init_sync_libfuncs_1 (optab tab, const char *base, int max)
 {
-  enum machine_mode mode;
+  machine_mode mode;
   char buf[64];
   size_t len = strlen (base);
   int i;
@@ -6414,7 +6414,7 @@ debug_optab_libfuncs (void)
   for (i = FIRST_NORM_OPTAB; i <= LAST_NORMLIB_OPTAB; ++i)
     for (j = 0; j < NUM_MACHINE_MODES; ++j)
       {
-	rtx l = optab_libfunc ((optab) i, (enum machine_mode) j);
+	rtx l = optab_libfunc ((optab) i, (machine_mode) j);
 	if (l)
 	  {
 	    gcc_assert (GET_CODE (l) == SYMBOL_REF);
@@ -6430,8 +6430,8 @@ debug_optab_libfuncs (void)
     for (j = 0; j < NUM_MACHINE_MODES; ++j)
       for (k = 0; k < NUM_MACHINE_MODES; ++k)
 	{
-	  rtx l = convert_optab_libfunc ((optab) i, (enum machine_mode) j,
-					 (enum machine_mode) k);
+	  rtx l = convert_optab_libfunc ((optab) i, (machine_mode) j,
+					 (machine_mode) k);
 	  if (l)
 	    {
 	      gcc_assert (GET_CODE (l) == SYMBOL_REF);
@@ -6451,7 +6451,7 @@ debug_optab_libfuncs (void)
 rtx
 gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode)
 {
-  enum machine_mode mode = GET_MODE (op1);
+  machine_mode mode = GET_MODE (op1);
   enum insn_code icode;
   rtx insn;
   rtx trap_rtx;
@@ -6579,10 +6579,10 @@ vector_compare_rtx (enum tree_code tcode, tree t_op0, tree t_op1,
    of the CPU.  SEL may be NULL, which stands for an unknown constant.  */
 
 bool
-can_vec_perm_p (enum machine_mode mode, bool variable,
+can_vec_perm_p (machine_mode mode, bool variable,
 		const unsigned char *sel)
 {
-  enum machine_mode qimode;
+  machine_mode qimode;
 
   /* If the target doesn't implement a vector mode for the vector type,
      then no operations are supported.  */
@@ -6635,8 +6635,8 @@ static rtx
 expand_vec_perm_1 (enum insn_code icode, rtx target,
 		   rtx v0, rtx v1, rtx sel)
 {
-  enum machine_mode tmode = GET_MODE (target);
-  enum machine_mode smode = GET_MODE (sel);
+  machine_mode tmode = GET_MODE (target);
+  machine_mode smode = GET_MODE (sel);
   struct expand_operand ops[4];
 
   create_output_operand (&ops[0], target, tmode);
@@ -6669,10 +6669,10 @@ expand_vec_perm_1 (enum insn_code icode, rtx target,
    and three operands.  */
 
 rtx
-expand_vec_perm (enum machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target)
+expand_vec_perm (machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target)
 {
   enum insn_code icode;
-  enum machine_mode qimode;
+  machine_mode qimode;
   unsigned int i, w, e, u;
   rtx tmp, sel_qi = NULL;
   rtvec vec;
@@ -6755,7 +6755,7 @@ expand_vec_perm (enum machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target)
   if (sel_qi == NULL)
     {
       /* Multiply each element by its byte size.  */
-      enum machine_mode selmode = GET_MODE (sel);
+      machine_mode selmode = GET_MODE (sel);
       if (u == 2)
 	sel = expand_simple_binop (selmode, PLUS, sel, sel,
 				   sel, 0, OPTAB_DIRECT);
@@ -6803,7 +6803,7 @@ expand_vec_perm (enum machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target)
    mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE.  */
 
 static inline enum insn_code
-get_vcond_icode (enum machine_mode vmode, enum machine_mode cmode, bool uns)
+get_vcond_icode (machine_mode vmode, machine_mode cmode, bool uns)
 {
   enum insn_code icode = CODE_FOR_nothing;
   if (uns)
@@ -6820,8 +6820,8 @@ get_vcond_icode (enum machine_mode vmode, enum machine_mode cmode, bool uns)
 bool
 expand_vec_cond_expr_p (tree value_type, tree cmp_op_type)
 {
-  enum machine_mode value_mode = TYPE_MODE (value_type);
-  enum machine_mode cmp_op_mode = TYPE_MODE (cmp_op_type);
+  machine_mode value_mode = TYPE_MODE (value_type);
+  machine_mode cmp_op_mode = TYPE_MODE (cmp_op_type);
   if (GET_MODE_SIZE (value_mode) != GET_MODE_SIZE (cmp_op_mode)
       || GET_MODE_NUNITS (value_mode) != GET_MODE_NUNITS (cmp_op_mode)
       || get_vcond_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type),
@@ -6840,8 +6840,8 @@ expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
   struct expand_operand ops[6];
   enum insn_code icode;
   rtx comparison, rtx_op1, rtx_op2;
-  enum machine_mode mode = TYPE_MODE (vec_cond_type);
-  enum machine_mode cmp_op_mode;
+  machine_mode mode = TYPE_MODE (vec_cond_type);
+  machine_mode cmp_op_mode;
   bool unsignedp;
   tree op0a, op0b;
   enum tree_code tcode;
@@ -6890,7 +6890,7 @@ expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
    2 for even/odd widening, and 3 for hi/lo widening.  */
 
 int
-can_mult_highpart_p (enum machine_mode mode, bool uns_p)
+can_mult_highpart_p (machine_mode mode, bool uns_p)
 {
   optab op;
   unsigned char *sel;
@@ -6939,13 +6939,13 @@ can_mult_highpart_p (enum machine_mode mode, bool uns_p)
 /* Expand a highpart multiply.  */
 
 rtx
-expand_mult_highpart (enum machine_mode mode, rtx op0, rtx op1,
+expand_mult_highpart (machine_mode mode, rtx op0, rtx op1,
 		      rtx target, bool uns_p)
 {
   struct expand_operand eops[3];
   enum insn_code icode;
   int method, i, nunits;
-  enum machine_mode wmode;
+  machine_mode wmode;
   rtx m1, m2, perm;
   optab tab1, tab2;
   rtvec v;
@@ -7014,10 +7014,10 @@ expand_mult_highpart (enum machine_mode mode, rtx op0, rtx op1,
 
 /* Return true if target supports vector masked load/store for mode.  */
 bool
-can_vec_mask_load_store_p (enum machine_mode mode, bool is_load)
+can_vec_mask_load_store_p (machine_mode mode, bool is_load)
 {
   optab op = is_load ? maskload_optab : maskstore_optab;
-  enum machine_mode vmode;
+  machine_mode vmode;
   unsigned int vector_sizes;
 
   /* If mode is vector mode, check it directly.  */
@@ -7054,7 +7054,7 @@ can_vec_mask_load_store_p (enum machine_mode mode, bool is_load)
 /* Return true if there is a compare_and_swap pattern.  */
 
 bool
-can_compare_and_swap_p (enum machine_mode mode, bool allow_libcall)
+can_compare_and_swap_p (machine_mode mode, bool allow_libcall)
 {
   enum insn_code icode;
 
@@ -7077,7 +7077,7 @@ can_compare_and_swap_p (enum machine_mode mode, bool allow_libcall)
 /* Return true if an atomic exchange can be performed.  */
 
 bool
-can_atomic_exchange_p (enum machine_mode mode, bool allow_libcall)
+can_atomic_exchange_p (machine_mode mode, bool allow_libcall)
 {
   enum insn_code icode;
 
@@ -7121,7 +7121,7 @@ find_cc_set (rtx x, const_rtx pat, void *data)
 static bool
 expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   rtx_code_label *label;
   rtx cmp_reg, success, oldval;
 
@@ -7171,7 +7171,7 @@ expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
 static rtx
 maybe_emit_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   enum insn_code icode;
 
   /* If the target supports the exchange directly, great.  */
@@ -7201,7 +7201,7 @@ static rtx
 maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
 				   enum memmodel model)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   enum insn_code icode;
   rtx_insn *last_insn = get_last_insn ();
 
@@ -7257,7 +7257,7 @@ maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
 static rtx 
 maybe_emit_compare_and_swap_exchange_loop (rtx target, rtx mem, rtx val)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
 
   if (can_compare_and_swap_p (mode, true))
     {
@@ -7282,7 +7282,7 @@ maybe_emit_compare_and_swap_exchange_loop (rtx target, rtx mem, rtx val)
 static rtx
 maybe_emit_atomic_test_and_set (rtx target, rtx mem, enum memmodel model)
 {
-  enum machine_mode pat_bool_mode;
+  machine_mode pat_bool_mode;
   struct expand_operand ops[3];
 
   if (!HAVE_atomic_test_and_set)
@@ -7349,7 +7349,7 @@ expand_sync_lock_test_and_set (rtx target, rtx mem, rtx val)
 rtx
 expand_atomic_test_and_set (rtx target, rtx mem, enum memmodel model)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   rtx ret, trueval, subtarget;
 
   ret = maybe_emit_atomic_test_and_set (target, mem, model);
@@ -7444,7 +7444,7 @@ expand_atomic_compare_and_swap (rtx *ptarget_bool, rtx *ptarget_oval,
 				bool is_weak, enum memmodel succ_model,
 				enum memmodel fail_model)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   struct expand_operand ops[8];
   enum insn_code icode;
   rtx target_oval, target_bool = NULL_RTX;
@@ -7465,7 +7465,7 @@ expand_atomic_compare_and_swap (rtx *ptarget_bool, rtx *ptarget_oval,
   icode = direct_optab_handler (atomic_compare_and_swap_optab, mode);
   if (icode != CODE_FOR_nothing)
     {
-      enum machine_mode bool_mode = insn_data[icode].operand[0].mode;
+      machine_mode bool_mode = insn_data[icode].operand[0].mode;
 
       /* Make sure we always have a place for the bool operand.  */
       if (ptarget_bool == NULL
@@ -7635,7 +7635,7 @@ expand_mem_signal_fence (enum memmodel model)
 rtx
 expand_atomic_load (rtx target, rtx mem, enum memmodel model)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   enum insn_code icode;
 
   /* If the target supports the load directly, great.  */
@@ -7691,7 +7691,7 @@ expand_atomic_load (rtx target, rtx mem, enum memmodel model)
 rtx
 expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   enum insn_code icode;
   struct expand_operand ops[3];
 
@@ -7886,7 +7886,7 @@ static rtx
 maybe_emit_op (const struct atomic_op_functions *optab, rtx target, rtx mem,
 	       rtx val, bool use_memmodel, enum memmodel model, bool after)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   struct expand_operand ops[4];
   enum insn_code icode;
   int op_counter = 0;
@@ -7956,7 +7956,7 @@ expand_atomic_fetch_op_no_fallback (rtx target, rtx mem, rtx val,
 				    enum rtx_code code, enum memmodel model,
 				    bool after)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   struct atomic_op_functions optab;
   rtx result;
   bool unused_result = (target == const0_rtx);
@@ -8045,7 +8045,7 @@ rtx
 expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
 			enum memmodel model, bool after)
 {
-  enum machine_mode mode = GET_MODE (mem);
+  machine_mode mode = GET_MODE (mem);
   rtx result;
   bool unused_result = (target == const0_rtx);
 
@@ -8176,7 +8176,7 @@ insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand)
 bool
 valid_multiword_target_p (rtx target)
 {
-  enum machine_mode mode;
+  machine_mode mode;
   int i;
 
   mode = GET_MODE (target);
@@ -8211,7 +8211,7 @@ maybe_legitimize_operand_same_code (enum insn_code icode, unsigned int opno,
 	  && !side_effects_p (addr))
 	{
 	  rtx_insn *last;
-	  enum machine_mode mode;
+	  machine_mode mode;
 
 	  last = get_last_insn ();
 	  mode = get_address_mode (mem);
@@ -8235,7 +8235,7 @@ static bool
 maybe_legitimize_operand (enum insn_code icode, unsigned int opno,
 			  struct expand_operand *op)
 {
-  enum machine_mode mode, imode;
+  machine_mode mode, imode;
   bool old_volatile_ok, result;
 
   mode = op->mode;
@@ -8463,23 +8463,23 @@ enum extraction_type { ET_unaligned_mem, ET_reg };
 static bool
 get_traditional_extraction_insn (extraction_insn *insn,
 				 enum extraction_type type,
-				 enum machine_mode mode,
+				 machine_mode mode,
 				 enum insn_code icode,
 				 int struct_op, int field_op)
 {
   const struct insn_data_d *data = &insn_data[icode];
 
-  enum machine_mode struct_mode = data->operand[struct_op].mode;
+  machine_mode struct_mode = data->operand[struct_op].mode;
   if (struct_mode == VOIDmode)
     struct_mode = word_mode;
   if (mode != struct_mode)
     return false;
 
-  enum machine_mode field_mode = data->operand[field_op].mode;
+  machine_mode field_mode = data->operand[field_op].mode;
   if (field_mode == VOIDmode)
     field_mode = word_mode;
 
-  enum machine_mode pos_mode = data->operand[struct_op + 2].mode;
+  machine_mode pos_mode = data->operand[struct_op + 2].mode;
   if (pos_mode == VOIDmode)
     pos_mode = word_mode;
 
@@ -8500,7 +8500,7 @@ get_traditional_extraction_insn (extraction_insn *insn,
 static bool
 get_optab_extraction_insn (struct extraction_insn *insn,
 			   enum extraction_type type,
-			   enum machine_mode mode, direct_optab reg_optab,
+			   machine_mode mode, direct_optab reg_optab,
 			   direct_optab misalign_optab, int pos_op)
 {
   direct_optab optab = (type == ET_unaligned_mem ? misalign_optab : reg_optab);
@@ -8527,7 +8527,7 @@ static bool
 get_extraction_insn (extraction_insn *insn,
 		     enum extraction_pattern pattern,
 		     enum extraction_type type,
-		     enum machine_mode mode)
+		     machine_mode mode)
 {
   switch (pattern)
     {
@@ -8575,9 +8575,9 @@ get_best_extraction_insn (extraction_insn *insn,
 			  enum extraction_pattern pattern,
 			  enum extraction_type type,
 			  unsigned HOST_WIDE_INT struct_bits,
-			  enum machine_mode field_mode)
+			  machine_mode field_mode)
 {
-  enum machine_mode mode = smallest_mode_for_size (struct_bits, MODE_INT);
+  machine_mode mode = smallest_mode_for_size (struct_bits, MODE_INT);
   while (mode != VOIDmode)
     {
       if (get_extraction_insn (insn, pattern, type, mode))
@@ -8611,7 +8611,7 @@ bool
 get_best_reg_extraction_insn (extraction_insn *insn,
 			      enum extraction_pattern pattern,
 			      unsigned HOST_WIDE_INT struct_bits,
-			      enum machine_mode field_mode)
+			      machine_mode field_mode)
 {
   return get_best_extraction_insn (insn, pattern, ET_reg, struct_bits,
 				   field_mode);
@@ -8630,7 +8630,7 @@ bool
 get_best_mem_extraction_insn (extraction_insn *insn,
 			      enum extraction_pattern pattern,
 			      HOST_WIDE_INT bitsize, HOST_WIDE_INT bitnum,
-			      enum machine_mode field_mode)
+			      machine_mode field_mode)
 {
   unsigned HOST_WIDE_INT struct_bits = (bitnum % BITS_PER_UNIT
 					+ bitsize