diff options
author | David S. Miller <davem@redhat.com> | 2002-06-11 05:22:48 -0700 |
---|---|---|
committer | David S. Miller <davem@gcc.gnu.org> | 2002-06-11 05:22:48 -0700 |
commit | 2f937369fa50dfd2f5af11b18d30c5489451072c (patch) | |
tree | 5f5a5da6b9ff25b136d9c1acd1a495af48658efb /gcc/optabs.c | |
parent | 43cf10b56ceb4bb309c6aac698845eebf734d351 (diff) | |
download | gcc-2f937369fa50dfd2f5af11b18d30c5489451072c.zip gcc-2f937369fa50dfd2f5af11b18d30c5489451072c.tar.gz gcc-2f937369fa50dfd2f5af11b18d30c5489451072c.tar.bz2 |
Delete SEQUENCE rtl usage outside of reorg and ssa passes.
2002-06-05 David S. Miller <davem@redhat.com>
Delete SEQUENCE rtl usage outside of reorg and ssa passes.
* rtl.h (gen_sequence, emit_insns, emit_insns_before,
emit_insns_before_scope, emit_insns_after,
emit_insns_after_scope): Delete declaration.
* ada/misc.c (insert_code_for): Use emit_insn* instead of
emit_insns_foo.
* config/alpha/alpha.c (alpha_set_memflags_1): Abort on SEQUENCE.
(alpha_set_memflags): Fix comment.
(set_frame_related_p): Use get_insns instead of gen_sequence.
* config/alpha/alpha.md (setjmp receiver splitter): Avoid
emitting no insns.
* config/arm/arm.c (arm_finalize_pic): Use get_insns instead of
gen_sequence.
(arm_gen_load_multiple, arm_gen_store_multiple): Likewise.
* config/fr30/fr30.c (fr30_move_double): Likewise.
* config/i386/i386.c (ix86_expand_int_movcc, ix86_expand_movstr):
Likewise.
* config/ia64/ia64.c (spill_restore_mem): Likewise.
* config/ia64/ia64.md (conditional move spliiter): Avoid emitting
no insns.
* config/m32r/m32r.c (gen_split_move_double): Use get_insns
instead of gen_sequence.
* config/mips/mips.c (embedded_pic_fnaddr_reg): Likewise.
(mips_expand_prologue, mips16_gp_pseudo_reg): Likewise.
* config/sh/sh.c (sh_need_epilogue): Likewise.
* config/sparc/sparc.md (current_function_calls_alloca, flat): New
attributes.
(setjmp pattern and split): Use them to avoid splitter which emits
no RTL.
* genattrtab.c (main): Emit include of function.h
* config/stormy16/stormy16.c (xstormy16_split_cbranch): Use
get_insns instead of gen_sequence.
* config/cris/cris.c (cris_split_movdx): Likewise.
* emit-rtl.c (emit_insns*): Kill.
(try_split): Expect insn list instead of SEQUENCE.
(make_jump_insn_raw, make_call_insn_raw): Fix comments.
(emit_*insn*): Reimplement to work with INSN lists and PATTERNs.
Make them abort if a SEQUENCE is given and RTL checking is
enabled.
(emit_*_scope): Don't forget to set scope on final insn.
(gen_sequence): Move from here...
* ssa.c (gen_sequence): To here as private function.
* builtins.c (expand_builtin_apply_args): Use emit_insn_foo, fix
comments.
(expand_builtin_return, expand_builtin_mathfn): Likewise.
(expand_builtin_strlen): Use get_insns instead of gen_sequence.
(expand_builtin_saveregs): Use emit_insn_foo, fix comments.
(expand_builtin_expect_jump): Use get_insns and fix comments.
* calls.c (try_to_integrate): Use emit_insn_foo.
(expand_call, emit_library_call_value_1): Likewise.
* expr.c (emit_queue): Handle insn lists instead of SEQUENCE.
(emit_move_insn_1): Use get_insns instead of gen_sequence.
(expand_expr): Use emit_insn_foo.
* cfgrtl.c (commit_one_edge_insertion): Use emit_insn_foo.
* except.c (build_post_landing_pads): Likewise.
* flow.c (attempt_auto_inc): Likewise.
* stmt.c (expand_fixup, fixup_gotos, expand_nl_handler_label,
expand_nl_goto_receivers, expand_decl_cleanup): Likewise.
* function.c (fixup_var_refs_insn): Use get_insns instead of
gen_sequence.
(fixup_var_refs_1): Likewise and expect insn list from gen_foo.
(fixup_memory_subreg): Use get_insns instead of gen_sequence.
(fixup_stack_1, purge_addressof_1, expand_main_function,
get_arg_pointer_save_area): Likewise.
(optimize_bit_field, instantiate_virtual_regs_1, assign_parms,
expand_function_end): Use emit_insn_foo.
(record_insns, keep_stack_depressed): Work with insn list instead
of SEQUENCE, fix comments.
* ifcvt.c (noce_emit_store_flag, noce_try_store_flag,
noce_try_store_flag_constants, noce_try_store_flag_inc,
noce_try_store_flag_mask, noce_emit_cmove, noce_try_cmove_arith,
noce_try_minmax, noce_try_abs): Use emit_insn_foo.
(noce_process_if_block): Use get_insns instead of gen_sequence.
* optabs.c (add_equal_note): Work with insn list, fix comments.
(expand_binop): Expect insn list from GEN_FCN(), use emit_insn_foo.
(expand_unop, expand_complex_abs, expand_unop_insn,
expand_no_conflict_block): Likewise.
(gen_move_insn): Use get_insns instead of gen_sequence.
(gen_cond_trap): Likewise.
* integrate.c (copy_rtx_and_substitute): Likewise.
(emit_initial_value_sets): Use emit_insn_foo.
* reload1.c (emit_output_reload_insns, emit_reload_insns): Likewise.
(fixup_abnormal_edges): Avoid losing REG_NOTES more intelligently
now that RTL generators give insn lists.
* sibcall.c (replace_call_placeholder): Use emit_insn_foo.
* doloop.c (doloop_modify, doloop_modify_runtime): Use get_insns
instead of gen_sequence.
(doloop_optimize): Work with insn lists instead of SEQUENCE rtl.
* explow.c (emit_stack_save, emit_stack_restore): Use get_insns
instead of gen_sequence.
* loop.c (move_movables, emit_prefetch_instructions,
gen_add_mult, check_dbra_loop, gen_load_of_final_value):
Likewise.
(loop_regs_update): Work with insn list instead of SEQUENCE rtl.
(product_cheap_p): Likewise, and add commentary about RTL wastage
here.
* lcm.c (optimize_mode_switching): Use get_insns instead of
gen_sequence.
* profile.c (gen_edge_profiler): Likewise.
* regmove.c (copy_src_to_dest): Likewise.
* reg-stack.c (compensate_edge): Likewise and fix comment.
* gcse.c (process_insert_insn): Likewise.
(insert_insn_end_bb): Work with insn list instead of SEQUENCE rtl.
* jump.c (delete_prior_computation): Update comment.
* genemit.c (gen_expand, gen_split, main): Use get_insns instead
of gen_sequence, update comments to match.
* recog.c (peephole2_optimize): Work with insn lists instead of
SEQUENCE rtl.
* sched-vis.c (print_pattern): Abort on SEQUENCE.
* unroll.c (unroll_loop, find_splittable_givs, final_giv_value):
Use get_insns instead of gen_sequence.
(copy_loop_body): Likewise and don't emit dummy NOTE.
* genrecog.c: Don't mention SEQUENCE rtl in comments.
* combine.c (try_combine): Expect insn lists from split generator.
* reorg.c (relax_delay_slots): Emit SEQUENCE into insn list by
hand.
From-SVN: r54497
Diffstat (limited to 'gcc/optabs.c')
-rw-r--r-- | gcc/optabs.c | 84 |
1 files changed, 53 insertions, 31 deletions
diff --git a/gcc/optabs.c b/gcc/optabs.c index 2b366ad..88cdf2f 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -121,7 +121,7 @@ static void emit_cmp_and_jump_insn_1 PARAMS ((rtx, rtx, enum machine_mode, static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *, enum machine_mode *, int *)); -/* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to +/* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to the result of operation CODE applied to OP0 (and OP1 if it is a binary operation). @@ -132,43 +132,65 @@ static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *, again, ensuring that TARGET is not one of the operands. */ static int -add_equal_note (seq, target, code, op0, op1) - rtx seq; +add_equal_note (insns, target, code, op0, op1) + rtx insns; rtx target; enum rtx_code code; rtx op0, op1; { - rtx set; - int i; + rtx last_insn, insn, set; rtx note; - if ((GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2' - && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<') - || GET_CODE (seq) != SEQUENCE - || (set = single_set (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1))) == 0 - || GET_CODE (target) == ZERO_EXTRACT - || (! rtx_equal_p (SET_DEST (set), target) - /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the - SUBREG. */ - && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART - || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)), - target)))) + if (! insns + || ! INSN_P (insns) + || NEXT_INSN (insns) == NULL_RTX) + abort (); + + if (GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2' + && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<') + return 1; + + if (GET_CODE (target) == ZERO_EXTRACT) + return 1; + + for (last_insn = insns; + NEXT_INSN (last_insn) != NULL_RTX; + last_insn = NEXT_INSN (last_insn)) + ; + + set = single_set (last_insn); + if (set == NULL_RTX) + return 1; + + if (! rtx_equal_p (SET_DEST (set), target) + /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the + SUBREG. */ + && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART + || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)), + target))) return 1; /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET besides the last insn. */ if (reg_overlap_mentioned_p (target, op0) || (op1 && reg_overlap_mentioned_p (target, op1))) - for (i = XVECLEN (seq, 0) - 2; i >= 0; i--) - if (reg_set_p (target, XVECEXP (seq, 0, i))) - return 0; + { + insn = PREV_INSN (last_insn); + while (insn != NULL_RTX) + { + if (reg_set_p (target, insn)) + return 0; + + insn = PREV_INSN (insn); + } + } if (GET_RTX_CLASS (code) == '1') note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0)); else note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1)); - set_unique_reg_note (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1), REG_EQUAL, note); + set_unique_reg_note (last_insn, REG_EQUAL, note); return 1; } @@ -817,10 +839,10 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) pat = GEN_FCN (icode) (temp, xop0, xop1); if (pat) { - /* If PAT is a multi-insn sequence, try to add an appropriate + /* If PAT is composed of more than one insn, try to add an appropriate REG_EQUAL note to it. If we can't because TEMP conflicts with an operand, call ourselves again, this time without a target. */ - if (GET_CODE (pat) == SEQUENCE + if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && ! add_equal_note (pat, temp, binoptab->code, xop0, xop1)) { delete_insns_since (last); @@ -1195,7 +1217,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) if (shift_count != BITS_PER_WORD) emit_no_conflict_block (insns, target, op0, op1, equiv_value); else - emit_insns (insns); + emit_insn (insns); return target; @@ -2146,7 +2168,7 @@ expand_unop (mode, unoptab, op0, target, unsignedp) pat = GEN_FCN (icode) (temp, xop0); if (pat) { - if (GET_CODE (pat) == SEQUENCE + if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX)) { delete_insns_since (last); @@ -2538,7 +2560,7 @@ expand_complex_abs (mode, op0, target, unsignedp) pat = GEN_FCN (icode) (temp, xop0); if (pat) { - if (GET_CODE (pat) == SEQUENCE + if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && ! add_equal_note (pat, temp, this_abs_optab->code, xop0, NULL_RTX)) { @@ -2707,7 +2729,7 @@ emit_unop_insn (icode, target, op0, code) pat = GEN_FCN (icode) (temp, op0); - if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN) + if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN) add_equal_note (pat, temp, code, op0, NULL_RTX); emit_insn (pat); @@ -2754,12 +2776,12 @@ emit_no_conflict_block (insns, target, op0, op1, equiv) rtx prev, next, first, last, insn; if (GET_CODE (target) != REG || reload_in_progress) - return emit_insns (insns); + return emit_insn (insns); else for (insn = insns; insn; insn = NEXT_INSN (insn)) if (GET_CODE (insn) != INSN || find_reg_note (insn, REG_LIBCALL, NULL_RTX)) - return emit_insns (insns); + return emit_insn (insns); /* First emit all insns that do not store into words of the output and remove these from the list. */ @@ -4082,7 +4104,7 @@ have_sub2_insn (x, y) } /* Generate the body of an instruction to copy Y into X. - It may be a SEQUENCE, if one insn isn't enough. */ + It may be a list of insns, if one insn isn't enough. */ rtx gen_move_insn (x, y) @@ -4153,7 +4175,7 @@ gen_move_insn (x, y) start_sequence (); emit_move_insn_1 (x, y); - seq = gen_sequence (); + seq = get_insns (); end_sequence (); return seq; } @@ -5260,7 +5282,7 @@ gen_cond_trap (code, op1, op2, tcode) if (insn) { emit_insn (insn); - insn = gen_sequence (); + insn = get_insns (); } end_sequence(); return insn; |