diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2020-12-31 16:10:47 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2020-12-31 16:10:47 +0000 |
| commit | 0411210fddbd3ec27c8dc1183f40f662712a2232 (patch) | |
| tree | 8e8148d489ca4378607eb44f5cc7f1da15d9343f /gcc/machmode.h | |
| parent | d2eb616a0f7bea78164912aa438c29fe1ef5774a (diff) | |
| download | gcc-0411210fddbd3ec27c8dc1183f40f662712a2232.zip gcc-0411210fddbd3ec27c8dc1183f40f662712a2232.tar.gz gcc-0411210fddbd3ec27c8dc1183f40f662712a2232.tar.bz2 | |
genmodes: Update GET_MODE_MASK when changing NUNITS [PR98214]
The static GET_MODE_MASKs for SVE vectors are based on the
static precisions, which in turn are based on 128-bit SVE.
The precisions are later updated based on -msve-vector-bits
(usually to become variable length), but the GET_MODE_MASK
stayed the same. This caused combine to fold:
(*_extract:DI (subreg:DI (reg:VNxMM R) 0) ...)
to zero because the extracted bits appeared to be insignificant.
gcc/
PR rtl-optimization/98214
* genmodes.c (emit_insn_modes_h): Emit a definition of CONST_MODE_MASK.
(emit_mode_mask): Treat mode_mask_array as non-constant if adj_nunits.
(emit_mode_adjustments): Update GET_MODE_MASK when updating
GET_MODE_NUNITS.
* machmode.h (mode_mask_array): Use CONST_MODE_MASK.
Diffstat (limited to 'gcc/machmode.h')
| -rw-r--r-- | gcc/machmode.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/machmode.h b/gcc/machmode.h index bb3a5c6..11247fc 100644 --- a/gcc/machmode.h +++ b/gcc/machmode.h @@ -712,7 +712,8 @@ extern CONST_MODE_FBIT unsigned char mode_fbit[NUM_MACHINE_MODES]; /* Get a bitmask containing 1 for all bits in a word that fit within mode MODE. */ -extern const unsigned HOST_WIDE_INT mode_mask_array[NUM_MACHINE_MODES]; +extern CONST_MODE_MASK unsigned HOST_WIDE_INT + mode_mask_array[NUM_MACHINE_MODES]; #define GET_MODE_MASK(MODE) mode_mask_array[MODE] |