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author | Pan Li <pan2.li@intel.com> | 2025-05-04 09:26:02 +0800 |
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committer | Pan Li <pan2.li@intel.com> | 2025-05-04 09:28:29 +0800 |
commit | e5a4663bc6367920a1cce6babb367424790d9bc8 (patch) | |
tree | c3dabcf963e926b4d9c49d7a986b71893cc08184 /gcc/m2/gm2-compiler/FifoQueue.mod | |
parent | 1425cfdb6efda912a99b23d12db9fb93fe98f258 (diff) | |
download | gcc-master.zip gcc-master.tar.gz gcc-master.tar.bz2 |
After we add the frm register to the global_regs, we may not need to
define_insn that volatile to emit the frm restore insns. The
cooperatively-managed global register will help to handle this, instead
of emit the volatile define_insn explicitly.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_emit_frm_mode_set): Refactor
the frm mode set by removing fsrmsi_restore_volatile.
* config/riscv/vector-iterators.md (unspecv): Remove as
unnecessary.
* config/riscv/vector.md (fsrmsi_restore_volatile): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-49.c: Adjust
the asm dump check times.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-50.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-52.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-74.c: Ditto.
* gcc.target/riscv/rvv/base/float-point-dynamic-frm-75.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc/m2/gm2-compiler/FifoQueue.mod')
0 files changed, 0 insertions, 0 deletions