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authorVladimir N. Makarov <vmakarov@redhat.com>2022-01-21 13:34:32 -0500
committerVladimir N. Makarov <vmakarov@redhat.com>2022-01-21 13:37:11 -0500
commit85419ac59724b7ce710ebb4acf03dbd747edeea3 (patch)
treefd41d96647548894170bacc8c0a45c8b7514da34 /gcc/lra.h
parent3abcbf243239f9576a60f4ce7f8ee4b3fa14784b (diff)
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[PR103676] LRA: Calculate and exclude some start hard registers for reload pseudos
LRA and old reload pass uses only one register class for reload pseudos even if operand constraints contain more one register class. Let us consider constraint 'lh' for thumb arm which means low and high thumb registers. Reload pseudo for such constraint will have general reg class (union of low and high reg classes). Assigning the last low register to the reload pseudo is wrong if the pseudo is of DImode as it requires two hard regs. But it is considered OK if we use general reg class. The following patch solves this problem for LRA. gcc/ChangeLog: PR target/103676 * ira.h (struct target_ira): Add member x_ira_exclude_class_mode_regs. (ira_exclude_class_mode_regs): New macro. * lra.h (lra_create_new_reg): Add arg exclude_start_hard_regs and move from here ... * lra-int.h: ... to here. (lra_create_new_reg_with_unique_value): Add arg exclude_start_hard_regs. (class lra_reg): Add member exclude_start_hard_regs. * lra-assigns.cc (find_hard_regno_for_1): Setup impossible_start_hard_regs from exclude_start_hard_regs. * lra-constraints.cc (get_reload_reg): Add arg exclude_start_hard_regs and pass it lra_create_new_reg[_with_unique_value]. (match_reload): Ditto. (check_and_process_move): Pass NULL exclude_start_hard_regs to lra_create_new_reg_with_unique_value. (goal_alt_exclude_start_hard_regs): New static variable. (process_addr_reg, simplify_operand_subreg): Pass NULL exclude_start_hard_regs to lra_create_new_reg_with_unique_value and get_reload_reg. (process_alt_operands): Setup goal_alt_exclude_start_hard_regs. Use this_alternative_exclude_start_hard_regs additionally to find winning operand alternative. (base_to_reg, base_plus_disp_to_reg, index_part_to_reg): Pass NULL exclude_start_hard_regs to lra_create_new_reg. (process_address_1, emit_inc): Ditto. (curr_insn_transform): Pass exclude_start_hard_regs value to lra_create_new_reg, get_reload_reg, match_reload. (inherit_reload_reg, split_reg): Pass NULL exclude_start_hard_regs to lra_create_new_reg. (process_invariant_for_inheritance): Ditto. * lra-remat.cc (update_scratch_ops): Ditto. * lra.cc (lra_create_new_reg_with_unique_value): Add arg exclude_start_hard_regs. Setup the corresponding member of lra reg info. (lra_create_new_reg): Add arg exclude_start_hard_regs and pass it to lra_create_new_reg_with_unique_value. (initialize_lra_reg_info_element): Initialize member exclude_start_hard_regs. (get_scratch_reg): Pass NULL to lra_create_new_reg. * ira.cc (setup_prohibited_class_mode_regs): Rename to setup_prohibited_and_exclude_class_mode_regs and calculate ira_exclude_class_mode_regs. gcc/testsuite/ChangeLog: PR target/103676 * g++.target/arm/pr103676.C: New.
Diffstat (limited to 'gcc/lra.h')
-rw-r--r--gcc/lra.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/gcc/lra.h b/gcc/lra.h
index 85713bb..4dd6cac 100644
--- a/gcc/lra.h
+++ b/gcc/lra.h
@@ -34,8 +34,6 @@ lra_get_allocno_class (int regno)
return reg_allocno_class (regno);
}
-extern rtx lra_create_new_reg (machine_mode, rtx, enum reg_class,
- const char *);
extern rtx lra_eliminate_regs (rtx, machine_mode, rtx);
extern void lra (FILE *);
extern void lra_init_once (void);