aboutsummaryrefslogtreecommitdiff
path: root/gcc/lra-constraints.c
diff options
context:
space:
mode:
authorRichard Sandiford <richard.sandiford@linaro.org>2017-09-12 13:29:05 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2017-09-12 13:29:05 +0000
commitad47462665eb1f923f3513cf52b42af22a76eb14 (patch)
tree39903780452660d7041b07767c2136d8b43fefaa /gcc/lra-constraints.c
parentc1b52c0ef6eeb91b5326eee18bb2652e3f732162 (diff)
downloadgcc-ad47462665eb1f923f3513cf52b42af22a76eb14.zip
gcc-ad47462665eb1f923f3513cf52b42af22a76eb14.tar.gz
gcc-ad47462665eb1f923f3513cf52b42af22a76eb14.tar.bz2
Convert hard_regno_nregs to a function
This patch converts hard_regno_nregs into an inline function, which in turn allows hard_regno_nregs to be used as the name of a targetm field. This is just a mechanical change. 2017-09-12 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * regs.h (hard_regno_nregs): Turn into a function. (end_hard_regno): Update accordingly. * caller-save.c (setup_save_areas): Likewise. (save_call_clobbered_regs): Likewise. (replace_reg_with_saved_mem): Likewise. (insert_restore): Likewise. (insert_save): Likewise. * combine.c (can_change_dest_mode): Likewise. (move_deaths): Likewise. (distribute_notes): Likewise. * config/mips/mips.c (mips_hard_regno_call_part_clobbered): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_cannot_change_mode_class) (rs6000_split_multireg_move): Likewise. (rs6000_register_move_cost): Likewise. (rs6000_memory_move_cost): Likewise. * config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Likewise. (rs6000_split_multireg_move): Likewise. (rs6000_register_move_cost): Likewise. (rs6000_memory_move_cost): Likewise. * cselib.c (cselib_reset_table): Likewise. (cselib_lookup_1): Likewise. * emit-rtl.c (set_mode_and_regno): Likewise. * function.c (aggregate_value_p): Likewise. * ira-color.c (setup_profitable_hard_regs): Likewise. (check_hard_reg_p): Likewise. (calculate_saved_nregs): Likewise. (assign_hard_reg): Likewise. (improve_allocation): Likewise. (calculate_spill_cost): Likewise. * ira-emit.c (modify_move_list): Likewise. * ira-int.h (ira_hard_reg_set_intersection_p): Likewise. (ira_hard_reg_in_set_p): Likewise. * ira.c (setup_reg_mode_hard_regset): Likewise. (clarify_prohibited_class_mode_regs): Likewise. (check_allocation): Likewise. * lra-assigns.c (find_hard_regno_for_1): Likewise. (lra_setup_reg_renumber): Likewise. (setup_try_hard_regno_pseudos): Likewise. (spill_for): Likewise. (assign_hard_regno): Likewise. (setup_live_pseudos_and_spill_after_risky_transforms): Likewise. * lra-constraints.c (in_class_p): Likewise. (lra_constraint_offset): Likewise. (simplify_operand_subreg): Likewise. (lra_constraints): Likewise. (split_reg): Likewise. (split_if_necessary): Likewise. (invariant_p): Likewise. (inherit_in_ebb): Likewise. * lra-lives.c (process_bb_lives): Likewise. * lra-remat.c (reg_overlap_for_remat_p): Likewise. (get_hard_regs): Likewise. (do_remat): Likewise. * lra-spills.c (assign_spill_hard_regs): Likewise. * mode-switching.c (create_pre_exit): Likewise. * postreload.c (reload_combine_recognize_pattern): Likewise. * recog.c (peep2_find_free_register): Likewise. * regcprop.c (kill_value_regno): Likewise. (set_value_regno): Likewise. (copy_value): Likewise. (maybe_mode_change): Likewise. (find_oldest_value_reg): Likewise. (copyprop_hardreg_forward_1): Likewise. * regrename.c (check_new_reg_p): Likewise. (regrename_do_replace): Likewise. * reload.c (push_reload): Likewise. (combine_reloads): Likewise. (find_dummy_reload): Likewise. (operands_match_p): Likewise. (find_reloads): Likewise. (find_equiv_reg): Likewise. (reload_adjust_reg_for_mode): Likewise. * reload1.c (count_pseudo): Likewise. (count_spilled_pseudo): Likewise. (find_reg): Likewise. (clear_reload_reg_in_use): Likewise. (free_for_value_p): Likewise. (allocate_reload_reg): Likewise. (choose_reload_regs): Likewise. (reload_adjust_reg_for_temp): Likewise. (emit_reload_insns): Likewise. (delete_output_reload): Likewise. * rtlanal.c (subreg_get_info): Likewise. * sched-deps.c (sched_analyze_reg): Likewise. * sel-sched.c (init_regs_for_mode): Likewise. (mark_unavailable_hard_regs): Likewise. (choose_best_reg_1): Likewise. (verify_target_availability): Likewise. * valtrack.c (dead_debug_insert_temp): Likewise. * var-tracking.c (track_loc_p): Likewise. (emit_note_insn_var_location): Likewise. * varasm.c (make_decl_rtl): Likewise. * reginfo.c (choose_hard_reg_mode): Likewise. (init_reg_modes_target): Refer directly to this_target_regs->x_hard_regno_nregs. From-SVN: r252014
Diffstat (limited to 'gcc/lra-constraints.c')
-rw-r--r--gcc/lra-constraints.c28
1 files changed, 15 insertions, 13 deletions
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 427f1d9..4859c58 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -291,7 +291,7 @@ in_class_p (rtx reg, enum reg_class cl, enum reg_class *new_class)
for (i = 0; i < class_size; i++)
{
hard_regno = ira_class_hard_regs[common_class][i];
- nregs = hard_regno_nregs[hard_regno][reg_mode];
+ nregs = hard_regno_nregs (hard_regno, reg_mode);
if (nregs == 1)
return true;
for (j = 0; j < nregs; j++)
@@ -676,7 +676,7 @@ lra_constraint_offset (int regno, machine_mode mode)
if (WORDS_BIG_ENDIAN
&& is_a <scalar_int_mode> (mode, &int_mode)
&& GET_MODE_SIZE (int_mode) > UNITS_PER_WORD)
- return hard_regno_nregs[regno][mode] - 1;
+ return hard_regno_nregs (regno, mode) - 1;
return 0;
}
@@ -1655,8 +1655,8 @@ simplify_operand_subreg (int nop, machine_mode reg_mode)
&& (hard_regno = lra_get_regno_hard_regno (REGNO (reg))) >= 0
/* Don't reload paradoxical subregs because we could be looping
having repeatedly final regno out of hard regs range. */
- && (hard_regno_nregs[hard_regno][innermode]
- >= hard_regno_nregs[hard_regno][mode])
+ && (hard_regno_nregs (hard_regno, innermode)
+ >= hard_regno_nregs (hard_regno, mode))
&& simplify_subreg_regno (hard_regno, innermode,
SUBREG_BYTE (operand), mode) < 0
/* Don't reload subreg for matching reload. It is actually
@@ -1726,8 +1726,8 @@ simplify_operand_subreg (int nop, machine_mode reg_mode)
else if (REG_P (reg)
&& REGNO (reg) >= FIRST_PSEUDO_REGISTER
&& (hard_regno = lra_get_regno_hard_regno (REGNO (reg))) >= 0
- && (hard_regno_nregs[hard_regno][innermode]
- < hard_regno_nregs[hard_regno][mode])
+ && (hard_regno_nregs (hard_regno, innermode)
+ < hard_regno_nregs (hard_regno, mode))
&& (regclass = lra_get_allocno_class (REGNO (reg)))
&& (type != OP_IN
|| !in_hard_reg_set_p (reg_class_contents[regclass],
@@ -4668,7 +4668,7 @@ lra_constraints (bool first_p)
{
int j, nregs;
- nregs = hard_regno_nregs[hard_regno][lra_reg_info[i].biggest_mode];
+ nregs = hard_regno_nregs (hard_regno, lra_reg_info[i].biggest_mode);
for (j = 0; j < nregs; j++)
df_set_regs_ever_live (hard_regno + j, true);
}
@@ -4865,7 +4865,8 @@ lra_constraints (bool first_p)
if (lra_reg_info[i].nrefs != 0
&& (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
{
- int j, nregs = hard_regno_nregs[hard_regno][PSEUDO_REGNO_MODE (i)];
+ int j, nregs = hard_regno_nregs (hard_regno,
+ PSEUDO_REGNO_MODE (i));
for (j = 0; j < nregs; j++)
lra_assert (df_regs_ever_live_p (hard_regno + j));
@@ -5477,7 +5478,7 @@ split_reg (bool before_p, int original_regno, rtx_insn *insn,
{
mode = PSEUDO_REGNO_MODE (original_regno);
hard_regno = reg_renumber[original_regno];
- nregs = hard_regno_nregs[hard_regno][mode];
+ nregs = hard_regno_nregs (hard_regno, mode);
rclass = lra_get_allocno_class (original_regno);
original_reg = regno_reg_rtx[original_regno];
call_save_p = need_for_call_save_p (original_regno);
@@ -5490,7 +5491,7 @@ split_reg (bool before_p, int original_regno, rtx_insn *insn,
if (call_save_p)
{
mode = HARD_REGNO_CALLER_SAVE_MODE (hard_regno,
- hard_regno_nregs[hard_regno][mode],
+ hard_regno_nregs (hard_regno, mode),
mode);
new_reg = lra_create_new_reg (mode, NULL_RTX, NO_REGS, "save");
}
@@ -5639,7 +5640,7 @@ split_if_necessary (int regno, machine_mode mode,
rtx next_usage_insns;
if (regno < FIRST_PSEUDO_REGISTER)
- nregs = hard_regno_nregs[regno][mode];
+ nregs = hard_regno_nregs (regno, mode);
for (i = 0; i < nregs; i++)
if (usage_insns[regno + i].check == curr_usage_insns_check
&& (next_usage_insns = usage_insns[regno + i].insns) != NULL_RTX
@@ -5685,7 +5686,7 @@ invariant_p (const_rtx x)
|| TEST_HARD_REG_BIT (eliminable_regset, regno)
|| GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
return false;
- nregs = hard_regno_nregs[regno][mode];
+ nregs = hard_regno_nregs (regno, mode);
for (i = 0; i < nregs; i++)
if (! fixed_regs[regno + i]
/* A hard register may be clobbered in the current insn
@@ -6207,7 +6208,8 @@ inherit_in_ebb (rtx_insn *head, rtx_insn *tail)
usage_insns[dst_regno].check = -(int) INSN_UID (curr_insn);
else
{
- nregs = hard_regno_nregs[dst_regno][reg->biggest_mode];
+ nregs = hard_regno_nregs (dst_regno,
+ reg->biggest_mode);
for (i = 0; i < nregs; i++)
usage_insns[dst_regno + i].check
= -(int) INSN_UID (curr_insn);