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authorRichard Sandiford <richard.sandiford@arm.com>2021-03-26 16:08:38 +0000
committerRichard Sandiford <richard.sandiford@arm.com>2021-03-26 16:08:38 +0000
commit6b8b0c8e243bdc122a9ddd42030275494b1148ff (patch)
tree8fd8df66a926282c55eac251c7ddd91c22391052 /gcc/ira.c
parent1205a8cadb6bd41cdf5b13d7aca8fb44332002e5 (diff)
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aarch64: Add costs for LD[34] and ST[34] postincrements
Most postincrements are cheap on Neoverse V1, but it's generally better to avoid them on LD[34] and ST[34] instructions. This patch adds separate address costs fields for these cases. Other CPUs continue to use the same costs for all postincrements. gcc/ * config/aarch64/aarch64-protos.h (cpu_addrcost_table::post_modify_ld3_st3): New member variable. (cpu_addrcost_table::post_modify_ld4_st4): Likewise. * config/aarch64/aarch64.c (generic_addrcost_table): Update accordingly, using the same costs as for post_modify. (exynosm1_addrcost_table, xgene1_addrcost_table): Likewise. (thunderx2t99_addrcost_table, thunderx3t110_addrcost_table): (tsv110_addrcost_table, qdf24xx_addrcost_table): Likewise. (a64fx_addrcost_table): Likewise. (neoversev1_addrcost_table): New. (neoversev1_tunings): Use neoversev1_addrcost_table. (aarch64_address_cost): Use the new post_modify costs for CImode and XImode.
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