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authorRichard Biener <rguenther@suse.de>2024-06-11 13:11:08 +0200
committerRichard Biener <rguenth@gcc.gnu.org>2024-07-04 08:57:54 +0200
commita4bbdec2be1c9f8fb49276b8a54ee86024ceac17 (patch)
treea46284182cbd1ebdf472bf7d575b1df268e444dd /gcc/gimplify.cc
parent699087a16591adfdf21228876b6c48dbcd353faa (diff)
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middle-end/115426 - wrong gimplification of "rm" asm output operand
When the operand is gimplified to an extract of a register or a register we have to disallow memory as we otherwise fail to gimplify it properly. Instead of __asm__("" : "=rm" __imag <r>); we want __asm__("" : "=rm" D.2772); _1 = REALPART_EXPR <r>; r = COMPLEX_EXPR <_1, D.2772>; otherwise SSA rewrite will fail and generate wrong code with 'r' left bare in the asm output. PR middle-end/115426 * gimplify.cc (gimplify_asm_expr): Handle "rm" output constraint gimplified to a register (operation). * gcc.dg/pr115426.c: New testcase.
Diffstat (limited to 'gcc/gimplify.cc')
-rw-r--r--gcc/gimplify.cc8
1 files changed, 8 insertions, 0 deletions
diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc
index 622c51d..5a9627c 100644
--- a/gcc/gimplify.cc
+++ b/gcc/gimplify.cc
@@ -7040,6 +7040,14 @@ gimplify_asm_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p)
ret = tret;
}
+ /* If the gimplified operand is a register we do not allow memory. */
+ if (allows_reg
+ && allows_mem
+ && (is_gimple_reg (TREE_VALUE (link))
+ || (handled_component_p (TREE_VALUE (link))
+ && is_gimple_reg (TREE_OPERAND (TREE_VALUE (link), 0)))))
+ allows_mem = 0;
+
/* If the constraint does not allow memory make sure we gimplify
it to a register if it is not already but its base is. This
happens for complex and vector components. */