From a4bbdec2be1c9f8fb49276b8a54ee86024ceac17 Mon Sep 17 00:00:00 2001 From: Richard Biener Date: Tue, 11 Jun 2024 13:11:08 +0200 Subject: middle-end/115426 - wrong gimplification of "rm" asm output operand When the operand is gimplified to an extract of a register or a register we have to disallow memory as we otherwise fail to gimplify it properly. Instead of __asm__("" : "=rm" __imag ); we want __asm__("" : "=rm" D.2772); _1 = REALPART_EXPR ; r = COMPLEX_EXPR <_1, D.2772>; otherwise SSA rewrite will fail and generate wrong code with 'r' left bare in the asm output. PR middle-end/115426 * gimplify.cc (gimplify_asm_expr): Handle "rm" output constraint gimplified to a register (operation). * gcc.dg/pr115426.c: New testcase. --- gcc/gimplify.cc | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'gcc/gimplify.cc') diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc index 622c51d..5a9627c 100644 --- a/gcc/gimplify.cc +++ b/gcc/gimplify.cc @@ -7040,6 +7040,14 @@ gimplify_asm_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p) ret = tret; } + /* If the gimplified operand is a register we do not allow memory. */ + if (allows_reg + && allows_mem + && (is_gimple_reg (TREE_VALUE (link)) + || (handled_component_p (TREE_VALUE (link)) + && is_gimple_reg (TREE_OPERAND (TREE_VALUE (link), 0))))) + allows_mem = 0; + /* If the constraint does not allow memory make sure we gimplify it to a register if it is not already but its base is. This happens for complex and vector components. */ -- cgit v1.1