AVR: target/117726 - Tweak ashiftrt:SI and lshiftrt:SI insns.

This patch is similar to r15-5569 (tweak ashift:SI) but for
ashiftrt and lshiftrt codes.  It splits constant shift offsets > 16
into a 3-operand byte shift and a 2-operand residual bit shift.
   Moreover, some of the constraint alternatives have been promoted
to 3-operand alternatives regardless of options.  For example,
ashift:HI and lshiftrt:HI can support 3 operands for offsets 9...12
without any overhead.
   Apart from that, it's a bit of code clean up for 2-byte and 4-byte
shift insns:  Use one RTL peephole with any_shift code iterator
instead of 3 individual peepholes.  It also removes some useless
split insns; presumably introduced during the cc0 -> CCmode work.

	PR target/117726
gcc/
	* config/avr/avr-passes.cc (avr_split_shift): Also handle
	ASHIFTRT and LSHIFTRT codes for 4-byte shifts.
	(constr_split_shift4): New code_attr.
	(avr_emit_shift): Adjust to new shift capabilities.
	* config/avr/predicates.md (scratch_or_d_register_operand):
	rename to scratch_or_dreg_operand.
	* config/avr/avr.md: Same.
	(define_peephole2): Write the RTL scratch peephole for 2-byte and
	4-byte shifts that generates *sh*<mode>3_const insns using code
	iterator any_shift.
	(*ashlhi3_const_split, *ashrhi3_const_split, *ashrhi3_const_split)
	(*lshrsi3_const_split, *lshrhi3_const_split): Remove useless
	split insns.
	(define_split) [avropt_split_bit_shift]: Add splitters
	for 4-byte ASHIFTRT and LSHIFTRT insns using avr_split_shift().
	(ashrsi3, *ashrsi3, *ashrsi3_const): Add "r,0,C4a" and "r,r,C4a"
	constraint alternatives depending on 2op, 3op.
	(lshrsi3, *lshrsi3, *lshrsi3_const): Add "r,0,C4r" and "r,r,C4r"
	constraint alternatives depending on 2op, 3op. Add "r,r,C15".
	(lshrhi3, *lshrhi3, *lshrhi3_const, ashlhi3, *ashlhi3)
	(*ashlhi3_const): Add "r,r,C7c" alternative.
	(ashrpsi, *ashrpsi3): Add "r,r,C22" alternative.
	(ashlqi, *ashlqi): Turn C06 alternative into "r,r,C06".
	* config/avr/constraints.md (C14, C22, C30, C7c): New constraints.
	* config/avr/avr.cc (ashlhi3_out, lshrhi3_out)
	[case 7, 9, 10, 11, 12]: Support as 3-operand insn.
	(lshrsi3_out) [case 15]: Same.
	(ashrsi3_out) [case 30]: Same.
	(ashrhi3_out) [case 14]: Same.
	(ashrqi3_out) [case 6]: Same.
	(avr_out_ashrpsi3) [case 22]: Same.
	* config/avr/avr.h: Fix comment typo.
	* doc/invoke.texi (AVR Options) <-msplit-bit-shift>: Document.

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