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authorKewen Lin <linkw@linux.ibm.com>2024-11-15 03:46:32 +0000
committerKewen Lin <linkw@gcc.gnu.org>2024-11-15 03:46:32 +0000
commita2da2fca004fd3002d45ba298f6203c7972f9eb6 (patch)
tree0720d3485babf84ffe497f7007810ae71ba88b62 /gcc/fortran
parent715eb6610b407e929bfcf151bbc34a71b48755fd (diff)
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rs6000: Rework vector float comparison in rs6000_emit_vector_compare - p1
All kinds of vector float comparison operators have been supported in a rtl comparison pattern as vector.md, we can just emit an rtx comparison insn with the given comparison operator in function rs6000_emit_vector_compare instead of checking and handling the reverse condition cases. This is part 1, it only handles the operators which are already emitted with an rtx comparison previously in function rs6000_emit_vector_compare_inner, they are EQ/GT/GE/ORDERED/ UNORDERED/UNEQ/LTGT. There is no functionality change. With this change, rs6000_emit_vector_compare_inner would only work for vector integer comparison handling, it would be cleaned up later in vector integer comparison rework. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare_inner): Move MODE_VECTOR_FLOAT handlings out. (rs6000_emit_vector_compare): Emit rtx comparison for operators EQ/GT/ GE/UNORDERED/ORDERED/UNEQ/LTGT of MODE_VECTOR_FLOAT directly, and adjust one call site of rs6000_emit_vector_compare_inner to rs6000_emit_vector_compare.
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