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| author | Pengxuan Zheng <quic_pzheng@quicinc.com> | 2024-10-14 05:37:49 -0700 |
|---|---|---|
| committer | Pengxuan Zheng <quic_pzheng@quicinc.com> | 2024-10-23 10:35:19 -0700 |
| commit | 9ffcf1f193b477f417a4c1960cd32696a23b99b4 (patch) | |
| tree | 6a19488141509de7cfab6e9861f1e04eae580465 /gcc/fortran | |
| parent | 774ad67fba458dd1beaa0f2d3e389aac46ca18b5 (diff) | |
| download | gcc-9ffcf1f193b477f417a4c1960cd32696a23b99b4.zip gcc-9ffcf1f193b477f417a4c1960cd32696a23b99b4.tar.gz gcc-9ffcf1f193b477f417a4c1960cd32696a23b99b4.tar.bz2 | |
aarch64: Improve scalar mode popcount expansion by using SVE [PR113860]
This is similar to the recent improvements to the Advanced SIMD popcount
expansion by using SVE. We can utilize SVE to generate more efficient code for
scalar mode popcount too.
Changes since v1:
* v2: Add a new VNx1BI mode and a new test case for V1DI.
* v3: Abandon VNx1BI changes and add a new variant of aarch64_ptrue_reg.
PR target/113860
gcc/ChangeLog:
* config/aarch64/aarch64-protos.h (aarch64_ptrue_reg): New function.
* config/aarch64/aarch64-simd.md (popcount<mode>2): Update pattern to
also support V1DI mode.
* config/aarch64/aarch64.cc (aarch64_ptrue_reg): New function.
* config/aarch64/aarch64.md (popcount<mode>2): Add TARGET_SVE support.
* config/aarch64/iterators.md (VDQHSD_V1DI): New mode iterator.
(SVE_VDQ_I): Add V1DI.
(bitsize): Likewise.
(VPRED): Likewise.
(VEC_POP_MODE): New mode attribute.
(vec_pop_mode): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/popcnt-sve.c: Update test.
* gcc.target/aarch64/popcnt11.c: New test.
* gcc.target/aarch64/popcnt12.c: New test.
Signed-off-by: Pengxuan Zheng <quic_pzheng@quicinc.com>
Diffstat (limited to 'gcc/fortran')
0 files changed, 0 insertions, 0 deletions