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| author | liuhongt <hongtao.liu@intel.com> | 2024-09-24 15:53:14 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2024-10-10 10:21:29 +0800 |
| commit | 9c8cea8feb6cd54ef73113a0b74f1df7b60d09dc (patch) | |
| tree | efcd53d6a4f137194d58f73774349bfc3385b5a3 /gcc/fortran | |
| parent | 8718727509b2d038d00afa3bd5ef8e0df216a287 (diff) | |
| download | gcc-9c8cea8feb6cd54ef73113a0b74f1df7b60d09dc.zip gcc-9c8cea8feb6cd54ef73113a0b74f1df7b60d09dc.tar.gz gcc-9c8cea8feb6cd54ef73113a0b74f1df7b60d09dc.tar.bz2 | |
Add new microarchitecture tune for SRF/GRR/CWF.
For Crestmont, 4-operand vex blendv instructions come from MSROM and
is slower than 3-instructions sequence (op1 & mask) | (op2 & ~mask).
legacy blendv instruction can still be handled by the decoder.
The patch add a new tune which is enabled for all processors except
for SRF/CWF. It will use vpand + vpandn + vpor instead of
vpblendvb(similar for vblendvps/vblendvpd) for SRF/CWF.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_sse_movcc): Guard
instruction blendv generation under new tune.
* config/i386/i386.h (TARGET_SSE_MOVCC_USE_BLENDV): New Macro.
* config/i386/x86-tune.def (X86_TUNE_SSE_MOVCC_USE_BLENDV):
New tune.
Diffstat (limited to 'gcc/fortran')
0 files changed, 0 insertions, 0 deletions