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| author | Pan Li <pan2.li@intel.com> | 2024-09-11 14:17:30 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2024-09-19 18:13:31 +0800 |
| commit | 427f82425855fbcd2991578f3b83672b7512efbd (patch) | |
| tree | d5132c30db5920cb2b6287e29d2e471a7e1ef780 /gcc/fortran | |
| parent | e917a251d82acf7c7c8577bd5dcb448deacb6f66 (diff) | |
| download | gcc-427f82425855fbcd2991578f3b83672b7512efbd.zip gcc-427f82425855fbcd2991578f3b83672b7512efbd.tar.gz gcc-427f82425855fbcd2991578f3b83672b7512efbd.tar.bz2 | |
RISC-V: Fix vector SAT_ADD dump check due to middle-end change
This patch would like fix the dump check times of vector SAT_ADD. The
middle-end change makes the match times from 2 to 4 times.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c: Adjust
the dump check times from 2 to 4.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc/fortran')
0 files changed, 0 insertions, 0 deletions