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authorPan Li <pan2.li@intel.com>2024-12-06 12:22:52 +0800
committerPan Li <pan2.li@intel.com>2024-12-09 09:30:38 +0800
commitf873c602d5ea5212e504426a56556a2e1415a40f (patch)
tree4757a7983140529672f2d096db5401761c4afe97 /gcc/fortran/trans-array.h
parenta41b1a001cb3b55975ed0316ca2041f4d8c20eb8 (diff)
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RISC-V: Fix incorrect optimization options passing to binop and cmp
Like the strided load/store, the testcases of vector binop and cmp are designed to pick up different sorts of optimization options but actually these option are ignored according to the Execution log of the gcc.log. This patch would like to make it correct almost the same as how we fixed for strided load/store. The below test suites are passed for this patch. * The rv64gcv fully regression test. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/rvv.exp: Fix the incorrect optimization options passing to testcases. Signed-off-by: Pan Li <pan2.li@intel.com>
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