RISC-V/testsuite: Add branchless cases for generic FP cond moves

Verify, for generic floating-point conditional-move operations that have
a corresponding conditional-set machine instruction, that if-conversion
triggers (via `cond_move_convert_if_block', which doesn't report) at
`-mbranch-cost=5' setting, which makes branchless code sequences emitted
by if-conversion cheaper than their original branched equivalents, and
that extraneous instructions such as SNEZ, etc. are not present in
output.

	gcc/testsuite/
	* gcc.target/riscv/movdifge.c: New test.
	* gcc.target/riscv/movdifgt.c: New test.
	* gcc.target/riscv/movdifle.c: New test.
	* gcc.target/riscv/movdiflt.c: New test.
	* gcc.target/riscv/movdifne.c: New test.
	* gcc.target/riscv/movsifge.c: New test.
	* gcc.target/riscv/movsifgt.c: New test.
	* gcc.target/riscv/movsifle.c: New test.
	* gcc.target/riscv/movsiflt.c: New test.
	* gcc.target/riscv/movsifne.c: New test.

0 files changed, 0 insertions, 0 deletions