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| author | Wilco Dijkstra <wilco.dijkstra@arm.com> | 2024-10-08 15:55:25 +0000 |
|---|---|---|
| committer | Wilco Dijkstra <wilco.dijkstra@arm.com> | 2024-10-23 12:45:10 +0000 |
| commit | 756890d66cf4971fc11187ccdf5893681aa661a1 (patch) | |
| tree | 4777775c5b8a173f3baee31769d78624e55c5c81 /gcc/fortran/options.cc | |
| parent | bcbf4fa46ae2919cf281322bd39f4810b7c18c9d (diff) | |
| download | gcc-756890d66cf4971fc11187ccdf5893681aa661a1.zip gcc-756890d66cf4971fc11187ccdf5893681aa661a1.tar.gz gcc-756890d66cf4971fc11187ccdf5893681aa661a1.tar.bz2 | |
AArch64: Improve SIMD immediate generation (2/3)
Allow use of SVE immediates when generating AdvSIMD code and SVE is available.
First check for a valid AdvSIMD immediate, and if SVE is available, try using
an SVE move or bitmask immediate.
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>):
Use aarch64_reg_or_orr_imm predicate. Combine SVE/AdvSIMD immediates
and use aarch64_output_simd_orr_imm.
* config/aarch64/aarch64.cc (struct simd_immediate_info): Add SVE_MOV.
(aarch64_sve_valid_immediate): Use SVE_MOV for SVE move immediates.
(aarch64_simd_valid_imm): Enable SVE SIMD immediates when possible.
(aarch64_output_simd_imm): Support emitting SVE SIMD immediates.
* config/aarch64/predicates.md (aarch64_orr_imm_sve_advsimd): Remove.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/sve/acle/asm/insr_s64.c: Allow SVE MOV imm.
* gcc.target/aarch64/sve/acle/asm/insr_u64.c: Likewise.
* gcc.target/aarch64/sve/fneg-abs_1.c: Update to check for ORRI.
* gcc.target/aarch64/sve/fneg-abs_2.c: Likewise.
* gcc.target/aarch64/sve/simd_imm_mov.c: New test.
Diffstat (limited to 'gcc/fortran/options.cc')
0 files changed, 0 insertions, 0 deletions