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authorRichard Sandiford <richard.sandiford@arm.com>2015-05-19 07:09:06 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2015-05-19 07:09:06 +0000
commitdc8afb709d753622e5110bb4bb88415200ce0c5a (patch)
tree25c6e2369912ec1fc912f445b0108ef913286eef /gcc/expr.c
parent53d1bae90176e1e1a605149d6bdfb9c455888289 (diff)
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rtl.h (REG_NREGS): New macro
gcc/ * rtl.h (REG_NREGS): New macro * alias.c (record_set): Use it. * cfgcleanup.c (mark_effect): Likewise. * combine.c (likely_spilled_retval_1): Likewise. (likely_spilled_retval_p, can_change_dest_mode): Likewise. (move_deaths, distribute_notes): Likewise. * cselib.c (cselib_record_set): Likewise. * df-problems.c (df_simulate_one_insn_forwards): Likewise. * df-scan.c (df_mark_reg): Likewise. * dse.c (look_for_hardregs): Likewise. * dwarf2out.c (reg_loc_descriptor): Likewise. (multiple_reg_loc_descriptor): Likewise. * expr.c (write_complex_part, read_complex_part): Likewise. (emit_move_complex): Likewise. * haifa-sched.c (setup_ref_regs): Likewise. * ira-lives.c (mark_hard_reg_live): Likewise. * lra.c (lra_set_insn_recog_data): Likewise. * mode-switching.c (create_pre_exit): Likewise. * postreload.c (reload_combine_recognize_const_pattern): Likewise. (reload_combine_recognize_pattern): Likewise. (reload_combine_note_use, move2add_record_mode): Likewise. (reload_cse_move2add): Likewise. * reg-stack.c (subst_stack_regs_pat): Likewise. * regcprop.c (kill_value, copy_value): Likewise. (copyprop_hardreg_forward_1): Likewise. * regrename.c (verify_reg_in_set, scan_rtx_reg): Likewise. (build_def_use): Likewise. * sched-deps.c (mark_insn_reg_birth, mark_reg_death): Likewise. (deps_analyze_insn): Likewise. * sched-rgn.c (check_live_1, update_live_1): Likewise. * sel-sched.c (count_occurrences_equiv): Likewise. * valtrack.c (dead_debug_insert_temp): Likewise. From-SVN: r223337
Diffstat (limited to 'gcc/expr.c')
-rw-r--r--gcc/expr.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/expr.c b/gcc/expr.c
index a026768..3259bd1 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -3051,7 +3051,7 @@ write_complex_part (rtx cplx, rtx val, bool imag_p)
where the natural size of floating-point regs is 32-bit. */
|| (REG_P (cplx)
&& REGNO (cplx) < FIRST_PSEUDO_REGISTER
- && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
+ && REG_NREGS (cplx) % 2 == 0))
{
rtx part = simplify_gen_subreg (imode, cplx, cmode,
imag_p ? GET_MODE_SIZE (imode) : 0);
@@ -3116,7 +3116,7 @@ read_complex_part (rtx cplx, bool imag_p)
where the natural size of floating-point regs is 32-bit. */
|| (REG_P (cplx)
&& REGNO (cplx) < FIRST_PSEUDO_REGISTER
- && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
+ && REG_NREGS (cplx) % 2 == 0))
{
rtx ret = simplify_gen_subreg (imode, cplx, cmode,
imag_p ? GET_MODE_SIZE (imode) : 0);
@@ -3346,10 +3346,10 @@ emit_move_complex (machine_mode mode, rtx x, rtx y)
&& optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
&& !(REG_P (x)
&& HARD_REGISTER_P (x)
- && hard_regno_nregs[REGNO (x)][mode] == 1)
+ && REG_NREGS (x) == 1)
&& !(REG_P (y)
&& HARD_REGISTER_P (y)
- && hard_regno_nregs[REGNO (y)][mode] == 1))
+ && REG_NREGS (y) == 1))
try_int = false;
/* Not possible if the values are inherently not adjacent. */
else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)