expr.c (expand_assignment): Add assertion to prevent emitting null rtx for movmisalign pattern.

	gcc/
	* expr.c (expand_assignment): Add assertion to prevent emitting
	null rtx for movmisalign pattern.
	(expand_expr_real_1): Likewise.
	* config/arm/arm.c (arm_builtin_support_vector_misalignment): New.
	(TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): New. Use above.
	(arm_vector_alignment_reachable): New.
	(TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE): New. Use above.
	(neon_vector_mem_operand): Disallow PRE_DEC for misaligned loads.
	(arm_print_operand): Include alignment qualifier in %A.
	* config/arm/neon.md (UNSPEC_MISALIGNED_ACCESS): New constant.
	(movmisalign<mode>): New expander.
	(movmisalign<mode>_neon_store, movmisalign<mode>_neon_load): New
	insn patterns.

	gcc/testsuite/
	* gcc.dg/vect/vect-42.c: Use vect_element_align instead of
	vect_hw_misalign.
	* gcc.dg/vect/vect-60.c: Likewise.
	* gcc.dg/vect/vect-56.c: Likewise.
	* gcc.dg/vect/vect-93.c: Likewise.
	* gcc.dg/vect/no-scevccp-outer-8.c: Likewise.
	* gcc.dg/vect/vect-95.c: Likewise.
	* gcc.dg/vect/vect-96.c: Likewise.
	* gcc.dg/vect/vect-outer-5.c: Use quad-word vectors when available.
	* gcc.dg/vect/slp-25.c: Likewise.
	* gcc.dg/vect/slp-3.c: Likewise.
	* gcc.dg/vect/vect-multitypes-1.c: Likewise.
	* gcc.dg/vect/no-vfa-pr29145.c: Likewise.
	* gcc.dg/vect/vect-multitypes-4.c: Likewise. Use vect_element_align.
	* gcc.dg/vect/vect-109.c: Likewise.
	* gcc.dg/vect/vect-peel-1.c: Likewise.
	* gcc.dg/vect/vect-peel-2.c: Likewise.
	* lib/target-supports.exp
	(check_effective_target_arm_vect_no_misalign): New.
	(check_effective_target_vect_no_align): Use above.
	(check_effective_target_vect_element_align): New.
	(add_options_for_quad_vectors): New.

From-SVN: r164941

1 files changed, 4 insertions, 0 deletions

diff --git a/gcc/expr.c b/gcc/expr.c
index d63ee55..51483f9 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -4223,6 +4223,9 @@ expand_assignment (tree to, tree from, bool nontemporal)
 	reg = copy_to_mode_reg (op_mode1, reg);
 
       insn = GEN_FCN (icode) (mem, reg);
+      /* The movmisalign<mode> pattern cannot fail, else the assignment would
+         silently be omitted.  */
+      gcc_assert (insn != NULL_RTX);
       emit_insn (insn);
       return;
     }
@@ -8674,6 +8677,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
 
 	    /* Nor can the insn generator.  */
 	    insn = GEN_FCN (icode) (reg, temp);
+	    gcc_assert (insn != NULL_RTX);
 	    emit_insn (insn);
 
 	    return reg;