diff options
| author | Julia Koval <julia.koval@intel.com> | 2017-11-16 07:07:00 +0100 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2017-11-16 06:07:00 +0000 |
| commit | fca51879ff3939a44588bd24e5e21af96feb01d6 (patch) | |
| tree | 9bc3831b14d730a7cbb738efd282a7a709105c8f /gcc/doc | |
| parent | e0c31a15faa00230fdd91b7fce179a8a92119b12 (diff) | |
| download | gcc-fca51879ff3939a44588bd24e5e21af96feb01d6.zip gcc-fca51879ff3939a44588bd24e5e21af96feb01d6.tar.gz gcc-fca51879ff3939a44588bd24e5e21af96feb01d6.tar.bz2 | |
Enable VBMI2 support [1/7]
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VBMI2_SET,
OPTION_MASK_ISA_AVX512VBMI2_UNSET): New.
(ix86_handle_option): Handle -mavx512vbmi2.
* config/i386/cpuid.h: Add bit_AVX512VBMI2.
* config/i386/driver-i386.c (host_detect_local_cpu): Handle new bit.
* config/i386/i386-c.c (__AVX512VBMI2__): New.
* config/i386/i386.c (ix86_target_string): Handle -mavx512vbmi2.
(ix86_valid_target_attribute_inner_p): Ditto.
* config/i386/i386.h (TARGET_AVX512VBMI2, TARGET_AVX512VBMI2_P): New.
* config/i386/i386.opt (mavx512vbmi2): New option.
* doc/invoke.texi: Add new option.
From-SVN: r254796
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 163e168..85c980b 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1204,8 +1204,8 @@ See RS/6000 and PowerPC Options. -mprefetchwt1 -mclflushopt -mxsavec -mxsaves @gol -msse4a -m3dnow -m3dnowa -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop @gol -mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx @gol --mmwaitx -mclzero -mpku -mthreads @gol --mcet -mibt -mshstk -mforce-indirect-call @gol +-mmwaitx -mclzero -mpku -mthreads -mgfni @gol +-mcet -mibt -mshstk -mforce-indirect-call -mavx512vbmi2 @gol -mms-bitfields -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol @@ -26012,12 +26012,18 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @need 200 @itemx -mcet @opindex mcet +@need 200 +@itemx -mavx512vbmi2 +@opindex mavx512vbmi2 +@need 200 +@itemx -mgfni +@opindex mgfni These switches enable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD, SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM, -AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA AVX512VBMI, BMI, BMI2, FXSR, -XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, IBT, SHSTK, -3DNow!@: or enhanced 3DNow!@: extended instruction sets. Each has a +AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA, AVX512VBMI, BMI, BMI2, +FXSR, XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU, IBT, SHSTK, AVX512VBMI2, +GFNI, 3DNow!@: or enhanced 3DNow!@: extended instruction sets. Each has a corresponding @option{-mno-} option to disable use of these instructions. These extensions are also available as built-in functions: see |